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* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-3/+3
| | | | pci_find_cap() instead.
* sysctl(9) cleanup checkpoint: amd64 GENERIC builds cleanly.mdf2011-01-121-1/+1
| | | | Commit the rest of the devices.
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-151-9/+8
| | | | | | | | | | | | | | | | | | | | | | | the NIC drivers as well as the PHY drivers to take advantage of the mii_attach() introduced in r213878 to get rid of certain hacks. For the most part these were: - Artificially limiting miibus_{read,write}reg methods to certain PHY addresses; we now let mii_attach() only probe the PHY at the desired address(es) instead. - PHY drivers setting MIIF_* flags based on the NIC driver they hang off from, partly even based on grabbing and using the softc of the parent; we now pass these flags down from the NIC to the PHY drivers via mii_attach(). This got us rid of all such hacks except those of brgphy() in combination with bce(4) and bge(4), which is way beyond what can be expressed with simple flags. While at it, I took the opportunity to change the NIC drivers to pass up the error returned by mii_attach() (previously by mii_phy_probe()) and unify the error message used in this case where and as appropriate as mii_attach() actually can fail for a number of reasons, not just because of no PHY(s) being present at the expected address(es). Reviewed by: jhb, yongari
* It seems some old Sundace(now IC Plus Corp.) controllers do notyongari2010-08-091-7/+20
| | | | | | | | | | | | | | | | | | like memory mapped register access. Typical problem from the issue was MII access returned unreliable values. I'm not sure this comes from lack of register flushing in MII access after accessing STE_PHYCTL register though. To address the issue, read hints data that controls which type of memory mapping should be used in driver. ste(4) still prefers memory mapping to io mapping but honor hints entered by user except for controllers that have problems with memory mapping. The hint to use iomapping could be given by adding the following line to /boot/device.hints file. hint.ste.0.prefer_iomap="1" PR: kern/149285 MFC after: 5 days
* Make sure to store dma address of RX buffer in little endian form.yongari2010-01-081-4/+6
| | | | This fixes the last bug which keeps ste(4) from working on sparc64.
* Fix EEPROM access code to return data in host byte order.yongari2010-01-081-13/+7
| | | | | | EEPROM on ST201 always returns 16bits data with little endian format so conversion to host order is required. This change fixes inversed ethernet address on sparc64.
* Remove extraneous semicolons, no functional changes.mbr2010-01-071-1/+1
| | | | | Submitted by: Marc Balmer <marc@msys.ch> MFC after: 1 week
* ether_ifattach sets if_mtu, remove unnecessary code.yongari2009-12-241-1/+0
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* Update if_iqdrops in case of RX buffer allocation failure.yongari2009-12-241-1/+1
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* Add suspend/resume support as well as basic WOL.yongari2009-12-241-24/+108
| | | | While I'm here simplify SIOCSIFCAP handler.
* Implement RX interrupt moderation using one-shot timer interrupt.yongari2009-12-242-27/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | Unlike TX interrupt, ST201 does not provide any mechanism to suppress RX interrupts. ste(4) can generate more than 70k RX interrupts under heavy RX traffics such that these excessive interrupts make system useless to process other useful things. Maybe this was the major reason why polling support code was introduced to ste(4). The STE_COUNTDOWN register provides a programmable counter that will generate an interrupt upon its expiration. We program STE_DMACTL register to use 3.2us clock rate to drive the counter register. Whenever ste(4) serves RX interrupt, the driver rearm the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables further generation of RX interrupts. This trick seems to work well and ste(4) generates less than 8k RX interrupts even under 64 bytes UDP torture test. Combined with TX interrupts, the total number of interrupts are less than 10k which looks reasonable on heavily loaded controller. The default RX interrupt moderation time is 150us. Users can change the value at any time with dev.ste.%d.int_rx_mod sysctl node. Setting it 0 effectively disables the RX interrupt moderation feature. Now we have both TX/RX interrupt moderation code so remove loop of interrupt handler which resulted in sub-optimal performance as well as more register accesses.
* We don't need to generate DMA complete interrupt for everyyongari2009-12-232-1/+18
| | | | | | | | | | | transmitted frames. So request interrupt for every 16th frames. Due to the limitation of hardware we can't suppress the interrupt as driver should have to check TX status register. The TX status register can store up to 31 TX status so driver can't send more than 31 frames without reading TX status register. With this change controller would not generate TX completion interrupt for every frame, so reclaim transmitted frames in ste_tick().
* Correct STE_COUNTDOWN register offset. The datasheet was wrong.yongari2009-12-231-1/+1
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* Remove unused duplicated register definition. It seems theyongari2009-12-231-12/+0
| | | | | | definition was made to access STE_ASICCTL register as 16bits but ste(4) always access the register as 32bits so it was never used before.
* Implement hardware MAC statistics counter support. The countersyongari2009-12-232-25/+169
| | | | could be accessed with dev.ste.0.stats sysctl node.
* Report the correct result of mii_mediachg(). Previously it alwaysyongari2009-12-231-19/+12
| | | | | | | used to return success without respect to the result. While I'm here use mii_mediachg() in ste_init_locked which allows driver to use currently configured media. ste_ifmedia_upd() is supposed to be called whenever user changes current media settings.
* Don't report link status if driver is not running.yongari2009-12-231-0/+4
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* Overhaul RX filter programming.yongari2009-12-231-62/+38
| | | | | | | | | | | | | | | | o Let RX filter handler program promiscuous/multicast filter as well as broadcasting. o Remove unnecessary register access. o Simplify ioctl handler and have set_rxfilter to handle IFF_PROMISC and IFF_ALLMULTI change instead of directly programming the controller. o Removed unnecessary error variable reinitialization in ioctl handler. o Add IFF_DRV_RUNNING check before programming multicast filter. o Configure maximum allowed frame length before enabling MAC. Datasheet didn't say the exact ordering of programming sequence but it looks more natural to set maximum allowed frame length first prior to enabling controller.
* Reimplement controller reset. Datasheet says full reset takes aboutyongari2009-12-231-8/+15
| | | | | | | 1ms. Since we switched to memory register mapping make sure to flush PCI posted write by reading the register again. While I'm here add additional delays in loop while driver waits the completion of the reset.
* Don't reinitialize controller if driver is already running. Thisyongari2009-12-231-2/+11
| | | | reduces number of link state UP/DOWN changes.
* Reimplement Tx status error handler as recommended by datasheet.yongari2009-12-222-21/+76
| | | | | | | | | | | | | | | | | | If ste(4) encounter TX underrun or excessive collisions the TX MAC of controller is stalled so driver should wake it up again. TX underrun requires increasing TX threshold value to minimize further TX underruns. Previously ste(4) used to reset controller to recover from TX underrun, excessive collision and reclaiming error. However datasheet says only TX underrun requires resetting entire controller. So implement ste_restart_tx() that restarts TX MAC and do not perform full reset except TX underrun case. Now ste(4) uses CSR_READ_2 instead of CSR_READ_1 to read STE_TX_STATUS register. This way ste(4) will also read frame id value and we can write the same value back to STE_TX_FRAMEID register instead of overwriting it to 0. The datasheet was wrong in write back of STE_TX_STATUS so add some comments why we do so. Also always invoke ste_txeoc() after ste_txeof() in ste_poll as without reading TX status register can stall TX MAC.
* Prefer bus_write_{1,2,4}/bus_read_{1,2,4} toyongari2009-12-222-11/+6
| | | | | bus_space_write_{1,2,4}/bus_space_read_{1,2,4}. Remove unused ste_bhandle and ste_btag in softc.
* Prefer memory space register mapping over io space. If memory spaceyongari2009-12-222-14/+15
| | | | | mapping fails fall back to old io space mapping. While I'm here use PCIR_BAR macro.
* Instead of relying on hard resetting of controller to stopyongari2009-12-221-20/+31
| | | | | | | | | | | | | | | | | receiving incoming traffics, try harder to gracefully stop active DMA cycles and then stop MACs. This is the way what datasheet recommends and seems to work reliably. Resetting controller while active DMAs are in progress is bad thing as we can't predict how DMAs touche allocated TX/RX buffers. This change ensures controller stop state before attempting to release allocated TX/RX buffers. Also update MAC statistics which could have been updated during the wait time of MAC stop. While I'm here remove unnecessary controller resets in various location. ste(4) no longer relies on hard controller reset to stop controller and resetting controller also clears all configured settings which makes it hard to implement WOL in near future. Now resetting a controller is performed in ste_init_locked().
* Reimplement miibus_statchg method. Don't rely on link state changeyongari2009-12-222-52/+78
| | | | | | | | | | | | | | | | | | | interrupt. If we want to use link state change interrupt ste(4) should also implement auto-negotiation complete handler as well as various PHY access handling. Now link state change is handled by mii(4) polling so it will automatically update link state UP/DOWN events which in turn make ste(4) usable with lagg(4). r199559 added a private timer to drive watchdog and the timer also used to drive MAC statistics update. Because the MAC statistics update is called whenever statistics counter reaches near-full, it drove watchdog timer too fast such that it caused false watchdog timeouts under heavy TX traffic conditions. Fix the regression by separating ste_stats_update() from driving watchdog timer and introduce a new function ste_tick() that handles periodic job such as driving watchdog, MAC statistics update and link state check etc. While I'm here clear armed watchdog timer in ste_stop().
* Introduce sc_flags member variable and use it to keep track ofyongari2009-12-222-12/+11
| | | | | | | link state and PHY related information. Remove ste_link and ste_one_phy variable of softc as it's not used anymore. While I'm here add IFF_DRV_RUNNING check in ste_start_locked().
* Add minimal dealy while ste(4) is waiting for the end of active DMAyongari2009-12-221-0/+1
| | | | cycle.
* Add bus_dma(9) and endianness support to ste(4).yongari2009-12-222-249/+553
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Sorted includes and added missing header files. o Added basic endianness support. In theory ste(4) should work on any architectures. o Remove the use of contigmalloc(9), contigfree(9) and vtophys(9). o Added 8 byte alignment limitation of TX/RX descriptor. o Added 1 byte alignment requirement for TX/RX buffers. o ste(4) controllers does not support DAC. Limit DMA address space to be within 32bit address. o Added spare DMA map to gracefully recover from DMA map failure. o Removed dead code for checking STE_RXSTAT_DMADONE bit. The bit was already checked in each iteration of loop so it can't be true. o Added second argument count to ste_rxeof(). It is used to limit number of iterations done in RX handler. ATM polling is the only consumer. o Removed ste_rxeoc() which was added to address RX stuck issue (cvs rev 1.66). Unlike TX descriptors, ST201 supports chaining descriptors to form a ring for RX descriptors. If RX descriptor chaining is not supported it's possible for controller to stop receiving incoming frames once controller pass the end of RX descriptor which in turn requires driver post new RX descriptors to receive more frames. For TX descriptors which does not support chaning, we exactly do manual chaining in driver by concatenating new descriptors to the end of previous TX chain. Maybe the workaround was borrowed from other drivers that does not support RX descriptor chaining, which is not valid for ST201 controllers. I still have no idea how this address RX stuck issue and I can't reproduce the RX stuck issue on DFE-550TX controller. o Removed hw.ste_rxsyncs sysctl as the workaround was removed. o TX/RX side bus_dmamap_load_mbuf_sg(9) support. o Reimplemented optimized ste_encap(). o Simplified TX logic of ste_start_locked(). o Added comments for TFD/RFD requirements. o Increased number of RX descriptors to 128 from 64. 128 gave much better performance than 64 under high network loads.
* Sort function prototyes.yongari2009-12-211-39/+38
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* style(9)yongari2009-12-211-100/+100
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* Remove trailing white spaces.yongari2009-12-212-14/+14
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* s/u_intXX_t/uintXX_t/gyongari2009-12-212-42/+42
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* o Remove unnecessary return statement.yongari2009-12-211-30/+2
| | | | o Remove register keyword.
* Use ANSI function definations.yongari2009-12-211-87/+34
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* - Add a private timer to drive the transmit watchdog instead of usingjhb2009-11-192-11/+11
| | | | | | if_watchdog and if_timer. - Fix some issues in detach for sn(4), ste(4), and ti(4). Primarily this means calling ether_ifdetach() before anything else.
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/rwatson2009-06-261-2/+2
| | | | | | | | | | | | | IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks
* When user_frac in the polling subsystem is low it is going to busy theattilio2009-05-301-8/+13
| | | | | | | | | | | | | | | | | | | | | CPU for too long period than necessary. Additively, interfaces are kept polled (in the tick) even if no more packets are available. In order to avoid such situations a new generic mechanism can be implemented in proactive way, keeping track of the time spent on any packet and fragmenting the time for any tick, stopping the processing as soon as possible. In order to implement such mechanism, the polling handler needs to change, returning the number of packets processed. While the intended logic is not part of this patch, the polling KPI is broken by this commit, adding an int return value and the new flag IFCAP_POLLING_NOCOUNT (which will signal that the return value is meaningless for the installed handler and checking should be skipped). Bump __FreeBSD_version in order to signal such situation. Reviewed by: emaste Sponsored by: Sandvine Incorporated
* Move the ste driver from sys/pci to sys/dev/ste.imp2008-08-142-0/+2302
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