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* MFC: r287768, r290566, r290946marius2015-12-271-17/+41
* MFC: r271864marius2015-12-271-1/+1
* MFC: r281337marius2015-07-051-9/+5
* MFC r273359:yongari2014-10-281-0/+6
* MFC r265943:yongari2014-05-161-15/+10
* MFC: r261531marius2014-02-231-7/+24
* MFH: sync the netmap code with the one in HEADluigi2014-02-181-3/+2
* MFC r257306:yongari2013-11-041-0/+2
* MFC r257305:yongari2013-11-041-2/+20
* MFC r256828:yongari2013-11-041-0/+2
* r256827:yongari2013-11-041-2/+3
* Correct comment typos.pluknet2013-06-281-5/+5
* use netmap_rx_irq() / netmap_tx_irq() to handle interrupts inluigi2013-04-301-7/+3
* Disable TX IP header checksum offloading on RL_HWREV_8168CP. Theyongari2013-03-131-2/+4
* Mechanically substitute flags from historic mbuf allocator withglebius2012-12-041-6/+6
* Remove duplicate const specifiers in many drivers (I hope I got all ofdim2012-11-051-2/+2
* Switch some PCI register reads from using magic numbers to using the namesgavin2012-09-191-2/+2
* Align the PCI Express #defines with the style used for the PCI-Xgavin2012-09-181-4/+4
* Use array notation for consistency.emaste2012-08-131-2/+2
* Fix size of the bcopy when extracting ethernet addresskevlo2012-06-251-1/+1
* Make sure we don't dereference a null pointerkevlo2012-05-111-4/+5
* Do not toggle IFCAP_TSO4 if we would also do TSO6. Given the driver doesbz2012-04-241-1/+1
* Prefer RL_GMEDIASTAT register to RGEPHY_MII_SSR register toyongari2012-02-281-13/+13
* A bunch of netmap fixes:luigi2012-02-271-0/+1
* Use correct Config registers for RTL8139 family. Unlike RTL8168 andyongari2012-02-251-26/+43
* For RTL8168/8111D controller, make sure to wake PHY from power downyongari2012-02-141-1/+6
* Fix a logic error which resulted in putting PHY into sleep when WOLyongari2012-01-191-1/+1
* Free allocated jumbo buffers when controller is stopped.yongari2012-01-171-2/+14
* Use a RX DMA tag to free loaded RX DMA maps.yongari2012-01-171-1/+1
* add netmap support for "em", "lem", "igb" and "re".luigi2011-12-051-0/+43
* To save more power, switch to 10/100Mbps link when controller isyongari2011-11-231-4/+76
* Make sure to stop TX MAC before freeing queued TX frames.yongari2011-11-231-5/+37
* Disable accepting frames in re_stop() to put RX MAC into idle state.yongari2011-11-231-3/+15
* Perform media change after setting IFF_DRV_RUNNING flag. Without it,yongari2011-11-221-2/+2
* Writing access to RL_CFG5 register also requires EEPROM writeyongari2011-11-221-5/+6
* - There's no need to overwrite the default device method with the defaultmarius2011-11-221-5/+1
* Add preliminary support for RTL8168/8111F PCIe Gigabit ethernet.yongari2011-11-171-1/+3
* Add preliminary support for second generation RTL8105E PCIeyongari2011-11-171-0/+2
* Disable PCIe ASPM (Active State Power Management) for allyongari2011-11-161-1/+21
* Add missing driver lock in SIOCSIFCAP handler.yongari2011-11-161-1/+3
* Add preliminary support for RTL8411 PCIe Gigabit ethernet withyongari2011-11-161-0/+2
* Add preliminary support for RTL8402 PCIe FastEthernet withyongari2011-11-161-0/+2
* Sprinkle some const.marius2011-11-021-6/+6
* Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.yongari2011-10-171-1/+1
* Add new device id of D-Link DGE-530T Rev. C controller. DGE-503Tyongari2011-07-301-0/+2
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-4/+4
* Add initial support for RTL8401E PCIe Fast Ethernet.yongari2011-02-161-1/+6
* Disable TX IP checksum offloading for RTL8168C controllers. Theyongari2011-02-041-4/+19
* Add support for RTL8105E PCIe Fast Ethernet controller. It seemsyongari2011-01-261-1/+7
* Do not use interrupt taskqueue on controllers with MSI/MSI-Xyongari2011-01-261-32/+175
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