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* Clean up -Wheader-guard warnings.pluknet2013-06-172-2/+2
| | | | | | Submitted by: <dt71@gmx.com> MFC after: 3 days X-MFC with: r251848
* All of Oxford/PLX OX16PCI954, OXm16PCI954 and OXu16PCI954 share themarius2013-06-131-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exact same (subsystem) device and vendor IDs. However, the reference design for the OXu16PCI954 uses a 14.7456 MHz clock (as does the EXSYS EX-41098-2 equipped with these), while at least the OX16PCI954 defaults to a 1.8432 MHz one. According to the datasheets of these chips, the only difference in PCI configuration space is that OXu16PCI954 have a revision ID of 1 while the other two are at 0. So employ the latter for determining the default clock rates of this family. Note that one might think that the actual clock could be derived from the Clock Prescaler Register (CPR) of these chips. Unfortunately, this is not that case and its use and content are orthogonal to the frequency of the crystal employed. Tested with an EXSYS EX-41098-2, which identifies and attaches as: pcib4@pci0:19:0:0: class=0x060400 card=0x02dd1014 chip=0x10801b21 rev=0x03 hdr=0x01 vendor = 'ASMedia Technology Inc.' device = 'ASM1083/1085 PCIe to PCI Bridge' class = bridge subclass = PCI-PCI puc0@pci0:20:4:0: class=0x070006 card=0x00001415 chip=0x95011415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' device = 'OX16PCI954 (Quad 16950 UART) function 0 (Uart)' class = simple comms subclass = UART puc1@pci0:20:4:1: class=0x068000 card=0x00001415 chip=0x95111415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' device = 'OX16PCI954 (Quad 16950 UART) function 1 (8bit bus)' class = bridge puc2@pci0:20:8:0: class=0x070006 card=0x00001415 chip=0x95011415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' device = 'OX16PCI954 (Quad 16950 UART) function 0 (Uart)' class = simple comms subclass = UART puc3@pci0:20:8:1: class=0x068000 card=0x00001415 chip=0x95111415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' device = 'OX16PCI954 (Quad 16950 UART) function 1 (8bit bus)' class = bridge pci20: <ACPI PCI bus> on pcib4 puc0: <Oxford Semiconductor OX16PCI954 UARTs> port 0x5000-0x501f, 0x5020-0x503f mem 0xc6000000-0xc6000fff,0xc6001000-0xc6001fff irq 16 at device 4.0 on pci20 uart1: <16950 or compatible> at port 1 on puc0 uart2: <16950 or compatible> at port 2 on puc0 uart3: <16950 or compatible> at port 3 on puc0 uart4: <16950 or compatible> at port 4 on puc0 puc1: <Oxford Semiconductor OX9160/OX16PCI954 UARTs (function 1)> port 0x5040-0x505f,0x5060-0x507f mem 0xc6002000-0xc6002fff,0xc6003000-0xc6003fff irq 16 at device 4.1 on pci20 puc2: <Oxford Semiconductor OX16PCI954 UARTs> port 0x5080-0x509f, 0x50a0-0x50bf mem 0xc6004000-0xc6004fff,0xc6005000-0xc6005fff irq 16 at device 8.0 on pci20 uart5: <16950 or compatible> at port 1 on puc2 uart6: <16950 or compatible> at port 2 on puc2 uart7: <16950 or compatible> at port 3 on puc2 uart8: <16950 or compatible> at port 4 on puc2 puc3: <Oxford Semiconductor OX9160/OX16PCI954 UARTs (function 1)> port 0x50c0-0x50df,0x50e0-0x50ff mem 0xc6006000-0xc6006fff,0xc6007000-0xc6007fff irq 16 at device 8.1 on pci20 MFC after: 2 weeks
* Fix whitespace and normalize some entries.marius2013-06-131-22/+22
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* Correct the definition for Exar XR17V258IV: we must use a config_functionrstone2013-03-181-0/+1
| | | | | | | | | to specify the offset into the PCI memory spare at which each serial port will find its registers. This was already done for other Exar PCI serial devices; it was accidentally omitted for this specific device. Sponsored by: Sandvine Incorporated MFC after: 1 week
* Add support for Exar XR17V358 8-port serial device to puc(4)rstone2013-03-151-0/+20
| | | | | | Reviewed by: marius Sponsored by: Sandvine Inc. MFC after: 1 week
* - Apparently, r186520 was just wrong and the clock of Oxford OX16PCI958 ismarius2013-03-011-7/+8
| | | | | | | | | | | | | | | | | | | neither DEFAULT_RCLK * 2 nor DEFAULT_RCLK * 10 but plain DEFAULT_RCLK and there's no (open) source indicating otherwise. This was tested with an EXSYS EX-41098-2, whose clock is not configurable and identifies as: puc0@pci0:5:1:0: class=0x070200 card=0x06711415 chip=0x95381415 rev=0x01 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' class = simple comms subclass = multiport serial Note that this exactly matches the card mentioned in PR 129665 so no sub-device/sub-vendor based quirking of the latter is possible. So maybe we should grow some sort of tunable, in case non-default cards such as the latter aren't configurable either (this also wouldn't be the first time an allegedly tested commit turns out to be wrong though). - Make the TiMedia tables const. MFC after: 1 week
* Do not require a filter-only interrupt handler for puc ports that are notjhb2013-01-151-1/+1
| | | | | | | | serial devices (such as printer ports). This allows ppc devices attached to puc to correctly setup an interrupt handler and work. Tested by: Andre Albsmeier Andre.Albsmeier@siemens.com MFC after: 1 week
* Add support for Advantech PCI-1602 RS-485/RS-422 serial cardeadler2012-11-091-0/+6
| | | | | | | PR: kern/169726 Submitted by: Jan Mikkelsen <janm@transactionware.com> Approved by: cperciva (implicit) MFC after: 5 days
* Add support for SIIG Cyber Serial Dual PCI 16C850eadler2012-08-051-0/+6
| | | | | | Submitted by: David Boyd David.Boyd@insightbb.com Approved by: cperciva MFC after: 3 days
* Add additional Perle Speed LE serial cardseadler2012-08-051-0/+25
| | | | | | | PR: kern/168816 Submitted by: Dennis Oyama <doyama@perle.com> Approved by: cperciva MFC after: 1 week
* - Change back "d_ofs" to int8_t to not pessimize padding and size of "struct ↵fjoe2012-07-312-6/+15
| | | | | | | | | puc_cfg". - Use "puc_config_moxa" for Moxa boards that need d_ofs greater than 0x7f Prodded by: marcel@, gavin@ MFC after: 3 days
* Remove Moxa CP-132EL definition (RS422/485-only board).fjoe2012-06-211-6/+0
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* Add support for the following Moxa PCIe multiport serial boards:fjoe2012-06-212-4/+39
| | | | | | | | | | | - CP102E - CP102EL - CP132EL - CP114EL - CP118EL-A - CP168EL-A MFC after: 1 week
* Add support for the Sunix SER5437A dual serial PCI Express card.jhay2012-06-081-0/+6
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* Add support for Sun 1040 PCI Quad Serialeadler2012-05-301-0/+6
| | | | | | | PR: kern/163450 Submitted by: Anonymous Hardware Hacker <silicium@harmony-p.ath.cx> Approved by: cperciva MFC after: 1 week
* - There's no need to overwrite the default device method with the defaultmarius2011-11-222-4/+4
| | | | | | | | | | one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID.
* - add support for Titan VScom PCIex-800Headler2011-11-151-0/+12
| | | | | | | PR: kern/124128 Submitted by: Maxim Frolov <maxim.frolov.07@gmail.com> (original) Approved by: jhb MFC after: 1 week
* - add support for CP-104EL-A and CP-104JU to puceadler2011-11-111-0/+27
| | | | | | PR: 151365 Submitted by: Joerg Niendorf <f5d10a@internode.on.net> Approved by: jhb
* Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.ed2011-11-071-1/+1
| | | | This means that their use is restricted to a single C file.
* - add support for I-O DATA RSA-PCI2/Readler2011-10-151-0/+6
| | | | | | | | PR: kern/142999 Submitted by: Takefu Kenji <takefu@airport.fm> Approved by: jhb Approved by: sahil (mentor) MFC after: 1 week
* Add Oxford Semiconductor OXPCIe952 (0x1c38) 1 port serial card.ae2011-09-291-0/+7
| | | | | | PR: kern/160895 Submitted by: Konstantin V. Krotov MFC after: 1 week
* Add device id for the Moxa CP-112UL dual-port serial adapters.jhb2011-08-151-0/+6
| | | | | | Submitted by: Jan Mikkelsen janm of transactionware com Approved by: re (kib) MFC after: 1 week
* Add location and pnpinfo strings for puc device ports. The location isjhb2011-06-144-2/+47
| | | | | | | | announced during boot and contains the port number. The pnpinfo string lists the port type (PUC_TYPE_* constants). Tested by: Boris Samorodov bsam ipt ru MFC after: 1 week
* Some style fixes.jhb2011-06-061-6/+4
| | | | Submitted by: bde
* - Rename the Cronyx Omega2-PCI entry to Exar XR17C158 since that is thejhb2011-06-031-13/+27
| | | | | | | | | | real owner of the device ID. Also rename the associated config function while here. - Add support for the 2-port and 4-port Exar parts as well: Exar XR17C/D152 and Exar XR17C154. Tested by: Mike Tancsa, Willy Offermans Willy of offermans rompen nl MFC after: 1 week
* For Timedia multiport serial adapters, the first two ports use a SUN1889jhb2011-05-261-0/+6
| | | | | | | | which uses a non-standard clock (* 8) while any additional ports use SUN1699 chips which use a standard clock. Tested by: N.J. Mann njm of njm me uk MFC after: 1 week
* Add support for the SIIG Cyber 2S PCIe adapter. It is based on anjhb2011-05-191-0/+6
| | | | | | | | | Oxford Semiconductor OX16PCI954 but uses only two ports with a non-default clock rate. PR: kern/152034 Tested by: Hans Fiedler hans of hermes louisville edu MFC after: 1 week
* Add an entry for the SIIG Quartet Serial 850 which uses an Oxfordjhb2011-05-101-0/+6
| | | | | | | chip with a non-default clock. PR: kern/147583 MFC after: 1 week
* Add an entry for the Kuroutoshikou SERIAL4P-LPPCI2 which uses an Oxfordjhb2011-05-021-0/+6
| | | | | | | | 4 port chip but with a nonstandard clock. PR: kern/104212 Submitted by: Shuichi KITAGUCHI kit of ysnb net MFC after: 1 week
* Add support for Oxford PCI Express Expresso family devices.jhb2011-04-281-1/+134
| | | | | | | | | For these devices, the number of supported ports is read from a register in BAR 0. PR: kern/134878 Submitted by: David Wood david of wood2 org uk MFC after: 1 week
* Add Exar octal PCI UART.emaste2010-12-181-0/+6
| | | | | Submitted by: Mark Johnston Obtained from: Sandvine Incorporated
* Add support for the Perle Speed4 LE.jhb2010-05-201-0/+12
| | | | | Submitted by: Douglas K. Rand rand of meridian-enviro com MFC after: 3 days
* Fix interrupt handling. It started off broken and grew worse over time.marcel2009-12-111-46/+62
| | | | | | | | | | | | | | | The rewrite of the interrupt handler includes: o loop until all pending interrupts are handled. This closes a race condition. o count the number of interrupt sources we handled so that we can properly return FILTER_HANDLED or FILTER_STRAY when we break out of the loop. o When matching the interrupt source to the devices that have that source pending, check only from the set of devices we found to have a pending interrupt. PR: kern/140947 MFC after: 3 days
* Add support for the NetMos NM9865 family of Serial/Parallel ports.marcel2009-12-071-3/+39
| | | | | Obtained from: NetMos MCS9865 v1.0.0.1 driver MFC after: 3 days
* Make puc(4) aware of this 2 port serial card based on NetMos 9835:np2009-06-201-0/+6
| | | | | | | puc0@pci0:4:1:0: class=0x070002 card=0x00021000 chip=0x98359710 rev=0x01 hdr=0x00 Reviewed by: marcel@ Approved by: gnn (mentor)
* Add support for the four PUC serial interfaces found on IBM SurePOS 300rwatson2009-06-021-0/+11
| | | | | | | series POS terminals. MFC after: 3 days Submitted by: Marc Balmer <marc at msys.ch>
* remove now-redunant cardbus attachment lines.imp2009-03-091-1/+0
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* Add support for the single-port NetMos NM9835 serial adapter. The puc(4)jhb2009-03-051-0/+12
| | | | | | | | | entry is a specific entry to override the generic NetMos entry so that puc(4) will leave this device alone and let uart(4) claim it. Submitted by: Navdeep Parhar nparhar @ gmail Reviewed by: marcel MFC after: 1 week
* Add support for the Sunix SUN1889-based dual parallel port card.kevlo2009-02-121-0/+6
| | | | | PR: kern/128219 Submitted by: Thinker K.F. Li <thinker at branda dot to>
* - Add support for Moxa Technologies CP-168EL/PCIe card.stas2009-01-271-0/+6
| | | | | Submitted by: dmarck MFC after: 1 week
* Add support for the Oxford OX16PCI958-based card.rik2008-12-271-0/+6
| | | | | | | | | | | Note, that the patch provided with this card for the Linux states that the card uses DEFAULT_RCLK * 2, while in fact it is '* 10'. So probably we should also use the subdevice/subvendord here. For now just ignore that fact. PR: kern/129665 Submitted by: bsam Obtained from: united efforst with bsam
* Add an entry for the "SIIG Cyber 4 PCI 16550", which is a four-port carddes2008-10-251-0/+6
| | | | | | based on the OX16PCI954 chip with a non-standard clock. MFC after: 3 days
* Revert r179409; it breaks all OX16PCI954-based cards except the SIIG 4.des2008-10-131-4/+4
| | | | MFC after: 3 days
* Add the Decision Computer Inc, PCCOM 8-port serial card.thompsa2008-08-221-0/+6
| | | | | PR: kern/69730 Submitted by: Darrin Smith
* Add the VScom PCI-100L card.thompsa2008-08-221-0/+6
| | | | | PR: kern/72352 Submitted by: Thomas Nystrom
* Add the Avlab Technology PCI IO 4S-850 4 port serial card.thompsa2008-08-211-0/+6
| | | | | PR: kern/110797 Submitted by: Trevor Roydhouse
* The SIIG 4 port serial card based on the Oxford OX16PCI954 ismckusick2008-05-291-4/+4
| | | | | | | | | | clocked at 10x normal speed. That is, when you set it for 9600 baud, it actually does 96000 baud. In order to make it plug and play with other serial ports, it has to have its clock rate reduced by a factor of 10. Discussed with: Marcel Moolenaar MFC after: 2 weeks
* Fix RID calculation. The RID is really the BAR for PCI cards,marcel2008-05-161-1/+1
| | | | | | | | so the index needs to be translated into an offset. While we did add the offset (0x10), we forgot to account for the width. Tested by: Thomas Vogt MFC after: 3 days
* o Add Moxa Technologies CP-104EL PCI Express 4 port Serial card.maxim2008-01-121-0/+6
| | | | | | PR: kern/119515 Submitted by: Gavin Stone-Tolcher MFC after: 1 month
* Rewrite puc_pci_match() to handle non-trivial cases correctly.des2007-10-131-14/+19
| | | | MFC after: 1 week
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