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* o Move ISA specific code from ppc.c to ppc_isa.c -- a bus front-marcel2006-04-241-0/+9
| | | | | | | | | | | | | | end for isa(4). o Add a seperate bus frontend for acpi(4) and allow ISA DMA for it when ISA is configured in the kernel. This allows acpi(4) attachments in non-ISA configurations, as is possible for ia64. o Add a seperate bus frontend for pci(4) and detect known single port parallel cards. o Merge PC98 specific changes under pc98/cbus into the MI driver. The changes are minor enough for conditional compilation and in this form invites better abstraction. o Have ppc(4) usabled on all platforms, now that ISA specifics are untangled enough.
* Convert inb/outb to bus_space.nsouch2001-06-231-17/+22
| | | | Submitted by: jcm@FreeBSD-uk.eu.org
* Consider that the chipset may be in ECP mode (from BIOS settings)nsouch2001-01-251-1/+2
| | | | | | | even if mode PS/2 is forced with bootflags. As a matter of fact, chipsets needs some extra configuration for accessing PS/2 mode from ECP. The current patch is only relevant for generic chipsets since specific code is supposed to deal with this during detection.
* Add support for the PC87303 chipset (found on Miata alphas) and adddfr2000-07-201-0/+1
| | | | | | | support for relocating the port address if the isa hints specify a different address from the address the chipset currently has. Submitted by: Andrew M. Miklic <miklic@ibm.net>
* Add smc37c935 chipset support and clean up the code which tries todfr2000-07-181-2/+29
| | | | | | | allocate a short port range in some alpha configurations. Submitted by: "Andrew M. Miklic" <miklic@udlkern.fc.hp.com>, Mark Abene <phiber@radicalmedia.com>
* Port ppc driver to alpha.dfr2000-05-141-2/+2
| | | | Submitted by: Andrew M. Miklic <miklic@ibm.net>
* Port of ppbus standalone framework to the newbus system.nsouch2000-01-141-8/+21
| | | | | | | | | | | | | | | | | | | | | Note1: the correct interrupt level is invoked correctly for each driver. For this purpose, drivers request the bus before being able to call BUS_SETUP_INTR and BUS_TEARDOWN_INTR call is forced by the ppbus core when drivers release it. Thus, when BUS_SETUP_INTR is called at ppbus driver level, ppbus checks that the caller owns the bus and stores the interrupt handler cookie (in order to unregister it later). Printing is impossible while plip link is up is still TRUE. vpo (ZIP driver) and lpt are make in such a way that using the ZIP and printing concurrently is permitted is also TRUE. Note2: specific chipset detection is not done by default. PPC_PROBE_CHIPSET is now needed to force chipset detection. If set, the flags 0x40 still avoid detection at boot. Port of the pcf(4) driver to the newbus system (was previously directly connected to the rootbus and attached by a bogus pcf_isa_probe function).
* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
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* Distinguish EPP address/data register. Add EPP address register access to ppi.nsouch1999-01-301-3/+6
| | | | | | | | Change microseq offsets. Previously, offsets of the program counter where added to the index of the current microinstruction. Make them rely on the index of the next executed microinstruction. Suggested by: Luigi Rizzo <luigi@labinfo.iet.unipi.it>
* Fix broken low level ppb_rxxx() return type: char becomes u_char.nsouch1999-01-101-9/+9
| | | | | | Submitted by: Bruce Evans <bde@zeta.org.au> Some ppb bootup printfs simplified.
* Major ppbus commit with:nsouch1999-01-101-4/+51
| | | | | | | | | | | | | | | | | | | + ECP parallel port chipset FIFO detection + DMA+FIFO parallel I/O handled as chipset specific + nlpt updated in order to use the above enhanced parallel I/O. Use 'lptcontrol -e' to use enhanced I/O + Various options documented in LINT + Full IEEE1284 NIBBLE and BYTE modes support. See ppbus(4) for an overview of the IEEE1284 standard + Detection of PnP parallel devices at boot + Read capability added to nlpt driver to get IEEE1284 compliant printer status with a simple 'cat /dev/lpt0' + IEEE1284 peripheral emulation added to BYTE mode. Two computers may dialog according to IEEE1284 signaling method. See PERIPH_1284 option and /sys/dev/ppbus/ppi.c All this code is supposed to provide basic functions for IEEE1284 programming. ppi.c and nlpt.c may act as examples.
* pcf.c: timeout management addednsouch1998-10-311-11/+17
| | | | ppc.c: nsc code improved. Actually, a complete rewrite.
* ppbus enhanced to support ZIP+ : microseq improvednsouch1998-09-131-1/+3
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* Major ppbus updates from the author.msmith1998-08-031-25/+54
| | | | | | | | | | | | | | | | | - ppbus now supports PLIP via the if_plip driver - ieee1284 infrastructure added, including parallel-port PnP - port microsequencer added, for scripting the sort of port I/O that is common with parallel devices without endless calls up and down through the driver structure. - improved bus ownership behaviour among the ppbus-using drivers. - improved I/O chipset feature detection The vpo driver is now implemented using the microsequencer, leading to some performance improvements as well as providing an extensive example of its use. Reviewed by: msmith Submitted by: Nicolas Souchu <Nicolas.Souchu@prism.uvsq.fr>
* Minor ppc_data structure tweak.msmith1997-08-161-3/+3
| | | | Submitted by: Nicolas Souchu <Nicolas.Souchu@prism.uvsq.fr>
* ISA Parallel-Port Bus chipset driver.msmith1997-08-141-0/+138
Submitted by: Nicolas Souchu <Nicolas.Souchu@prism.uvsq.fr>
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