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* Convert callers to the new bus_alloc_resource_any(9) API.njl2004-03-171-1/+1
| | | | | Submitted by: Mark Santcroos <marks@ripe.net> Reviewed by: imp, dfr, bde
* Device megapatch 4/6:phk2004-02-211-0/+2
| | | | | | | | Introduce d_version field in struct cdevsw, this must always be initialized to D_VERSION. Flip sense of D_NOGIANT flag to D_NEEDGIANT, this involves removing four D_NOGIANT flags and adding 145 D_NEEDGIANT flags.
* It appears that the changes in the resources allocated is causing muchimp2004-01-171-1/+4
| | | | | | | pain and suffering. Attempt to back it out by removing the 'if the requested range is larger than the window, clip to the window' code. This is a band-aide until the issues are better understood and the issues with the lazy allocation patches are resolved.
* Add support for subtractive decoding bridges. These bridges pass allimp2004-01-112-159/+128
| | | | | | | | | | | | | | | | | | | signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
* MF-p4/diff reduction:imp2004-01-111-1/+0
| | | | Eliminate trailing blank line in this file.
* Minor whitespace changes to conform better to stlye(9) and reduce diffsimp2003-12-241-5/+5
| | | | with uncommitted changes I have in p4.
* Initial landing of SMP support for FreeBSD/amd64.peter2003-11-171-1/+1
| | | | | | | | | | | | | | | | - This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
* Enable PCI interrupt routing for i386 SMP kernels.jhb2003-11-031-1/+1
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* Make the cardbus driver a derived class of the pci driver. In theory, thisdfr2003-11-011-5/+1
| | | | should allow many of the pci methods to be re-staticised.
* Change all SYSCTLS which are readonly and have a related TUNABLEsilby2003-10-211-1/+1
| | | | | from CTLFLAG_RD to CTLFLAG_RDTUN so that sysctl(8) can provide more useful error messages.
* The code that was meant to test alignment of the register offsetse2003-10-111-46/+24
| | | | | | | | | | | | | | | | | | | | | | parameter in the read and write case dereferenced an unitialized pointer and can't possibly ever have catched an actual invalid argument. This was apparently true for the read/write and getconf cases. The latter does not even receive the paramter that is to be verified. I'm surprised that this did not cause kernel panics, but it seems that the uninitialized local variable happens to contain data that may be used as a pointer to memory that satisfies the test condition. Make the code work as intended by moving the test inside the switch case where the pointer has been properly initialized. Since the read and write case shared just about all code (except for the single call to PCIB_READ_CONFIG resp. PCIB_WRITE_CONFIG) I have merged both cases. Noticed by: trhodes@FreeBSD.org (Tom Rhodes)
* Add pci_resume() to reestablish interrupt routing afteriwasaki2003-09-172-1/+34
| | | | | | suspend/resume. Especially after hibernation, interrupt routing went back to initial status on some machines.
* Teach the PCI code to parse MSI extended capabilities. Re-arrange thescottl2003-09-143-23/+55
| | | | pcicfg struct a bit to hold extcap structures instead of structure members.
* Expand the extended capabilities list and add definitions for MSI.scottl2003-09-141-7/+42
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* Remove most of the magic constants from the extcap parsing code.scottl2003-09-141-3/+3
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* Bring back PCIR_HEADERTYPE as an alias for PCIR_HDRTYPE under BURN_BRIDGESjhb2003-09-031-0/+3
| | | | | | for backwards compat. The old name will be gone in 6.0, but will be around in 5.x. This will help unbreak 3rd party code, e.g. the nvidia DRM module.
* Replace another instance of PCIR_MAPS with PCIR_BAR(x).jhb2003-09-031-1/+1
| | | | Reminded by: dfr
* Use PCIR_BAR(x) instead of PCIR_MAPS.jhb2003-09-021-1/+1
| | | | | Glanced over by: imp, gibbs Tested by: i386 LINT
* - Deprecate PCIR_MAPS under BURN_BRIDGES (meaning it will be gone in 6.0)jhb2003-09-021-1/+5
| | | | | | | | and replace it with the more intuitive name PCIR_BARS. - Add a PCIR_BAR(x) macro that returns the config space register offset of the 32-bit BAR x. MFC after: 3 days
* Don't try to enable io or memory access for non-standard resourcedfr2003-09-011-6/+9
| | | | | addresses. This stops resource allocations for e.g. amdpm failing - this has its own special ways of enabling access.
* - Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.jhb2003-08-282-7/+8
| | | | | | | | | | | - Add a new PCIM_HDRTYPE constant for the field in PCIR_HDRTYPE that holds the header type. - Replace several magic numbers with appropriate constants for the header type register and a couple of PCI_FUNCMAX. - Merge to amd64 the fix to the i386 bridge code to skip devices with unknown header types. Requested by: imp (1, 2)
* Add constants for capability IDs and header types.jhb2003-08-281-0/+14
| | | | Submitted by: Samy Al Bahra <samy@kerneled.com>
* Use __FBSDID().obrien2003-08-246-15/+19
| | | | Also some minor style cleanups.
* Prefer new location of pci include files (which have only been in theimp2003-08-226-12/+12
| | | | | tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
* Prefer the uintXX_t to the u_intXX_t names.imp2003-08-225-119/+119
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* Define PCI_MAXHDRTYPE to be 2. We know about header types 0, 1 and 2.imp2003-08-012-10/+2
| | | | | Update the MI device scanning code to use PCI_MAXHDRTYPE rather than the hard coded 2.
* Update the 'ps', 'show pci', and 'show ktr' ddb commands to use the newjhb2003-07-311-29/+4
| | | | pager callout instead of homerolling their own paging facility.
* - Make the isab devclass global to allow for multiple ISA bridge drivers.jhb2003-07-081-12/+7
| | | | | | | - Factor out code common to all ISA bridge drivers attach methods into a isab_attach() function. - Rename the PCI-ISA bridge driver's attach function to pci_isab_attach() and have it call isab_attach().
* Add a new PCI interface method, assign_interrupt, to determine thetmm2003-07-013-6/+23
| | | | | | | | | | | | | | | | interrupt to be used for a device. This is intended solely for internal use of PCI bus implementations, and exists so that PCI bus drivers implementing special interrupt assignment methods which require additional work at the bus level to work right can be easily derived from the generic driver (or any other one) without resorting to hacks. It will be used in the sparc64 ofw_pcibus driver, which will be committed shortly. Make use of this method in the generic implementation, and add it to the method table of bus drivers derived from the PCI one. Reviewed by: imp, -hackers
* Allow to write the intpin ivar using the pci_set_intpin() accessor. Theretmm2003-07-011-1/+3
| | | | | | | | are some Sun PCI devices around which bogusly set intpin to 0, although they use the intline mechanism; this allows the device driver to correct that. Reviewed by: imp
* prevent the number of patterns from exceeding the number of pci devices.jmg2003-06-231-1/+1
| | | | Submitted by: rwatson
* cleanup /dev/pci code some:jmg2003-06-231-54/+20
| | | | | | | | | read permision only required for listing, read/write required for read/write to registers fix a possible memory leak clean up error handling a bit Reviewed by: silence
* Re-enabled PCI irq routing on pc98.nyan2003-06-221-1/+1
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* use a REG macro that was already defined.jmg2003-06-221-3/+10
| | | | | | | | Reorder how the pci probing in handled. before adding devices, check to see if the slot is a multi-function device to see if we should probe all the functions. Original idea by: imp
* When we re-route a PCI interrupt, write the new IRQ value into the intlinejhb2003-06-091-2/+3
| | | | | | register. Reviewed by: imp
* Don't route PCI irq on pc98.nyan2003-06-081-1/+1
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* - Adjust the comment about re-routing PCI interrupts to be lessjhb2003-06-071-7/+11
| | | | | | | | | | | ia64-specific. - When trying to re-route interrupts, don't change cfg->intline if the re-route fails by returning an invalid vector. This fixes machines without any way of routing interrupts such as older PC's without a $PIR table. We do not currently write the new intline value back to the hardware, but we should. That will likely be added in a later commit.
* Batton down the hatches!!!jhb2003-06-041-1/+1
| | | | | | | | Always route PCI interrupts on i386 UP machines. I was planning to enable this for i386 anyways once SMP support is done. Having this enabled fixes problems on many people's laptops. Requested by: imp
* Remove unused variable(s).phk2003-05-311-9/+0
| | | | | | Remove break after return; Found by: FlexeLint
* Calculate routed interrupts using the slot number from the device andticso2003-05-221-1/+1
| | | | | | not that of the bridge. Approved by: re (jhb)
* Add constants for USB programming interfaces. These are already defineddes2003-04-231-0/+3
| | | | | | (with other names) in the USB driver sources, but I felt that pcireg.h should have a complete list - at least of classes and interfaces that we know about and use.
* Return status for PCI methods '{enable,disable}_{io,busmaster}'.mdodd2003-04-164-25/+65
| | | | Reviewed by: imp
* When the driver allocates memory or I/O ports, enable that bit in theimp2003-04-151-14/+26
| | | | | | | | | command config register. At the present, this represents a nop because these bits should have been set earlier in the process. In the future, we'll only set these bits when the driver requests the resource, not when the bus code detects the resource. Reviewed by: mdodd
* Gigacommit to improve device-driver source compatibility betweenphk2003-03-031-13/+5
| | | | | | | | | | | | | branches: Initialize struct cdevsw using C99 sparse initializtion and remove all initializations to default values. This patch is automatically generated and has been tested by compiling LINT with all the fields in struct cdevsw in reverse order on alpha, sparc64 and i386. Approved by: re(scottl)
* Make /dev/pci use MAJOR_AUTO.se2003-03-011-0/+4
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* Back out M_* changes, per decision of the TRB.imp2003-02-192-2/+2
| | | | Approved by: trb
* Include class designation in pnpinfo for generic driver loadingimp2003-02-181-2/+3
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* Move the pnp and location info into the common pci bus. Make all knownimp2003-02-172-0/+35
| | | | | | | | | pci busses implement this. Also minor comment smithing in cardbus. Fix copyright to this year with my name on it since I've been doing a lot to this file. Reviewed by: jhb
* These don't need to be semi-public after all.imp2003-02-172-5/+5
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* Use rman_get_device rather than rle->resl->r_dev.imp2003-02-162-8/+6
| | | | | make pci_hdrtypedata and pci_read_extcap accessible (but maybe in the end we'll make them private again).
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