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* Implement BUS_ADD_CHILD() for the isab(4) driver. It already callsjhb2011-12-141-0/+1
* Add a constant for the Advisory Non-Fatal Error bit in AER corrected errorjhb2011-11-301-0/+1
* - There's no need to overwrite the default device method with the defaultmarius2011-11-223-6/+3
* Add missing XHCI early takeover code. The XHCI takeover codehselasky2011-07-221-1/+66
* Respect the BIOS/firmware's notion of acceptable address ranges for PCIjhb2011-07-153-13/+184
* PCIB_ALLOC_MSIX() may already fail on the first pass, f.e. when the PCI-PCImarius2011-07-131-1/+4
* Properly align the end of a candidate back region based on the window'sjhb2011-07-121-1/+1
* Implement pci_find_class(9), the function to find a pci device by its class.kib2011-07-092-0/+16
* Split out host_pcib_get_busno() from the generic PCI-PCI bridge driver tojhb2011-06-242-92/+130
* Minor whitespace and style fixes.jhb2011-06-211-3/+4
* Fix some off-by-one errors with the ending address of candidate regionsjhb2011-06-101-3/+4
* More properly handle Cardbus cards that that store their CIS in a BAR afterjhb2011-06-061-0/+11
* Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved itru2011-05-171-0/+1
* Allow direct children of PCI-ISA bridges to allocate resources frombrix2011-05-131-7/+111
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously thejhb2011-05-033-5/+695
* Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,jhb2011-05-022-0/+2
* Only align MSI message groups based on the number of messages beingjhb2011-04-271-1/+1
* Explicitly track the state of all known BARs for each PCI device. The PCIjhb2011-03-314-99/+172
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-1/+1
* Rename pci_find_extcap() to pci_find_cap(). PCI now uses the termjhb2011-03-222-6/+12
* Partially revert previous change. Drop the quirk to disable MSI for HTjhb2011-03-181-19/+2
* Fix a few issues with HyperTransport devices and MSI interrupts:jhb2011-03-182-4/+44
* Properly handle BARs bigger than 4G. The '1' was treated as an intjhb2011-02-231-3/+3
* Use the preload_fetch_addr() and preload_fetch_size() conveniencemarcel2011-02-131-9/+14
* Don't whine about child drivers calling pci_enable_busmaster(). That isjhb2010-12-201-4/+0
* Add device IDs for two more ServerWorks Host-PCI bridges so that we canjhb2010-11-251-0/+2
* Resume critical PCI devices (and their children) first, then everything elsejkim2010-11-221-1/+28
* The EHCI_CAPLENGTH and EHCI_HCIVERSION registers are actually sub-registersnwhitehorn2010-10-251-1/+1
* - Add a new PCI quirk to whitelist an old chipset that doesn't supportjhb2010-10-221-1/+31
* Clarify a misleading comment. The test in pci_reserve_map() was meant tojhb2010-10-211-9/+9
* Update PCI power management registers per PCI Bus Power Management Interfacejkim2010-10-203-18/+22
* Introduce a new tunable 'hw.pci.do_power_suspend'. This tunable lets youjkim2010-10-203-2/+11
* Do not apply do_power_resume for suspending P2P bridge as we did in r214064.jkim2010-10-201-1/+1
* Remove PCI header type 0 restriction from power state changes. PCI config.jkim2010-10-191-3/+1
* Do not apply do_power_resume for suspending case. When do_powerstate wasjkim2010-10-191-4/+3
* Remove unnecessary castings and fix couple of style(9) nits.jkim2010-10-151-4/+3
* Move setting power state for children into a separate function as they werejkim2010-10-151-38/+40
* - Rename the constant for the Master Data Parity Error flag in thejhb2010-09-091-24/+24
* - Add register definitions related to extended capability IDs injhb2010-09-081-0/+84
* Add a new method to the PCI bridge interface, PCIB_POWER_FOR_SLEEP(). Thisjhb2010-08-174-52/+54
* - Retire acpi_pcib_resume(). It is has just been an alias forjhb2010-08-051-0/+1
* Consistently check header type after reading PCIR_HDRTYPE register.yongari2010-07-291-18/+23
* Fix 'pciconf -a' by providing an implementation of PCIOCATTACHED.neel2010-07-291-0/+10
* Provide more defines for PCI-Express device ctrl.raj2010-07-111-0/+3
* Virtualize pci_remap_msi_irq() call from general MSI code. It allows MSImav2010-06-142-11/+5
* Honor hw.pci.do_power_nodriver on resume. Power-down devices withoutmav2010-05-221-0/+2
* Add support for the U4 PCI-Express bridge chipset used in late-generationnwhitehorn2010-05-161-3/+3
* Small whitespace fixes.jhb2010-03-111-2/+1
* Add pci_get|set_max_read_req() helper functions to control maximum PCIemav2010-02-052-0/+37
* Add more bit definitions to PCI express device control and deviceyongari2010-02-011-0/+8
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