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* Fix for boot issue: Don't disable BARs on AGP devices. In general:hselasky2012-03-291-0/+21
* Add a PCI quirk to ignore PCI map registers from configuration space.jkim2012-03-141-8/+36
* Save more of config space for PCI Express and PCI-X devices.kan2012-03-083-0/+127
* Remove the PAE-specific 2GB DMA boundary since HEAD now supports a proper 4Gjhb2012-03-071-11/+0
* Simplify the PCI bus dma tag code a bit. First, don't create a tag atjhb2012-03-072-8/+15
* Expand the set of APIs available for locating PCI capabilities:jhb2012-03-036-7/+163
* Update the pci_get_vpd_readonly() wrapper to use 'vptr' instead ofjhb2012-03-031-2/+2
* Fix a typo.jhb2012-03-031-1/+1
* - Add a bus_dma tag to each PCI bus that is a child of a Host-PCI bridge.jhb2012-03-022-5/+64
* Add pci_save_state() and pci_restore_state() wrappers aroundjhb2012-03-012-0/+21
* Use pci_printf() instead of a home-rolled version in the VPD parsing code.jhb2012-02-291-17/+9
* - As it turns out, MSI-X is broken for at least LSI SAS1068E when passedmarius2012-02-141-10/+11
* Fix a spelling mistake in the surprise link down error constant.jhb2012-01-311-1/+1
* Add a constant for the PCI-e surprise link down uncorrectable error.jhb2012-01-301-0/+1
* Properly return success once a matching VPD entry is found injhb2012-01-191-3/+1
* Implement BUS_ADD_CHILD() for the isab(4) driver. It already callsjhb2011-12-141-0/+1
* Add a constant for the Advisory Non-Fatal Error bit in AER corrected errorjhb2011-11-301-0/+1
* - There's no need to overwrite the default device method with the defaultmarius2011-11-223-6/+3
* Add missing XHCI early takeover code. The XHCI takeover codehselasky2011-07-221-1/+66
* Respect the BIOS/firmware's notion of acceptable address ranges for PCIjhb2011-07-153-13/+184
* PCIB_ALLOC_MSIX() may already fail on the first pass, f.e. when the PCI-PCImarius2011-07-131-1/+4
* Properly align the end of a candidate back region based on the window'sjhb2011-07-121-1/+1
* Implement pci_find_class(9), the function to find a pci device by its class.kib2011-07-092-0/+16
* Split out host_pcib_get_busno() from the generic PCI-PCI bridge driver tojhb2011-06-242-92/+130
* Minor whitespace and style fixes.jhb2011-06-211-3/+4
* Fix some off-by-one errors with the ending address of candidate regionsjhb2011-06-101-3/+4
* More properly handle Cardbus cards that that store their CIS in a BAR afterjhb2011-06-061-0/+11
* Renamed PCI_INTERFACE_XHCI to PCIP_SERIALBUS_USB_XHCI and moved itru2011-05-171-0/+1
* Allow direct children of PCI-ISA bridges to allocate resources frombrix2011-05-131-7/+111
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously thejhb2011-05-033-5/+695
* Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,jhb2011-05-022-0/+2
* Only align MSI message groups based on the number of messages beingjhb2011-04-271-1/+1
* Explicitly track the state of all known BARs for each PCI device. The PCIjhb2011-03-314-99/+172
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-1/+1
* Rename pci_find_extcap() to pci_find_cap(). PCI now uses the termjhb2011-03-222-6/+12
* Partially revert previous change. Drop the quirk to disable MSI for HTjhb2011-03-181-19/+2
* Fix a few issues with HyperTransport devices and MSI interrupts:jhb2011-03-182-4/+44
* Properly handle BARs bigger than 4G. The '1' was treated as an intjhb2011-02-231-3/+3
* Use the preload_fetch_addr() and preload_fetch_size() conveniencemarcel2011-02-131-9/+14
* Don't whine about child drivers calling pci_enable_busmaster(). That isjhb2010-12-201-4/+0
* Add device IDs for two more ServerWorks Host-PCI bridges so that we canjhb2010-11-251-0/+2
* Resume critical PCI devices (and their children) first, then everything elsejkim2010-11-221-1/+28
* The EHCI_CAPLENGTH and EHCI_HCIVERSION registers are actually sub-registersnwhitehorn2010-10-251-1/+1
* - Add a new PCI quirk to whitelist an old chipset that doesn't supportjhb2010-10-221-1/+31
* Clarify a misleading comment. The test in pci_reserve_map() was meant tojhb2010-10-211-9/+9
* Update PCI power management registers per PCI Bus Power Management Interfacejkim2010-10-203-18/+22
* Introduce a new tunable 'hw.pci.do_power_suspend'. This tunable lets youjkim2010-10-203-2/+11
* Do not apply do_power_resume for suspending P2P bridge as we did in r214064.jkim2010-10-201-1/+1
* Remove PCI header type 0 restriction from power state changes. PCI config.jkim2010-10-191-3/+1
* Do not apply do_power_resume for suspending case. When do_powerstate wasjkim2010-10-191-4/+3
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