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path: root/sys/dev/pci/pci.c
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* Explicitly track the state of all known BARs for each PCI device. The PCIjhb2011-03-311-49/+153
* Rename pci_find_extcap() to pci_find_cap(). PCI now uses the termjhb2011-03-221-5/+5
* Partially revert previous change. Drop the quirk to disable MSI for HTjhb2011-03-181-19/+2
* Fix a few issues with HyperTransport devices and MSI interrupts:jhb2011-03-181-4/+43
* Properly handle BARs bigger than 4G. The '1' was treated as an intjhb2011-02-231-3/+3
* Use the preload_fetch_addr() and preload_fetch_size() conveniencemarcel2011-02-131-9/+14
* Resume critical PCI devices (and their children) first, then everything elsejkim2010-11-221-1/+28
* The EHCI_CAPLENGTH and EHCI_HCIVERSION registers are actually sub-registersnwhitehorn2010-10-251-1/+1
* - Add a new PCI quirk to whitelist an old chipset that doesn't supportjhb2010-10-221-1/+31
* Clarify a misleading comment. The test in pci_reserve_map() was meant tojhb2010-10-211-9/+9
* Update PCI power management registers per PCI Bus Power Management Interfacejkim2010-10-201-1/+1
* Introduce a new tunable 'hw.pci.do_power_suspend'. This tunable lets youjkim2010-10-201-1/+9
* Remove PCI header type 0 restriction from power state changes. PCI config.jkim2010-10-191-3/+1
* Do not apply do_power_resume for suspending case. When do_powerstate wasjkim2010-10-191-4/+3
* Remove unnecessary castings and fix couple of style(9) nits.jkim2010-10-151-4/+3
* Move setting power state for children into a separate function as they werejkim2010-10-151-38/+40
* Add a new method to the PCI bridge interface, PCIB_POWER_FOR_SLEEP(). Thisjhb2010-08-171-32/+21
* Consistently check header type after reading PCIR_HDRTYPE register.yongari2010-07-291-18/+23
* Virtualize pci_remap_msi_irq() call from general MSI code. It allows MSImav2010-06-141-5/+5
* Honor hw.pci.do_power_nodriver on resume. Power-down devices withoutmav2010-05-221-0/+2
* Add support for the U4 PCI-Express bridge chipset used in late-generationnwhitehorn2010-05-161-3/+3
* Add pci_get|set_max_read_req() helper functions to control maximum PCIemav2010-02-051-0/+34
* Move the PCI-specific logic of removing a cardbus device into ajhb2010-01-051-0/+40
* Teach the PCI bus driver to handle PCIR_BIOS BARs properly and remove specialjhb2009-12-301-4/+79
* Remove no longer used pci_release_resource().jhb2009-12-301-19/+0
* Implement a rudimentary suspend/resume methods for PCI P2P bridge.jkim2009-12-101-1/+1
* For some buses, devices may have active resources assigned even though theyjhb2009-12-091-62/+22
* Disable interrupts after doing early takeover of the usb controller in case usbthompsa2009-11-251-0/+17
* BIOSes, buggy or otherwise, are i386 or amd64 specific.marcel2009-10-231-0/+4
* Workaround buggy BIOS code in USB regard. By doing the BIOS to OS handover forthompsa2009-10-151-0/+121
* Don't reread the command register to see if enabling I/O or memoryjhb2009-09-221-25/+1
* Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0marius2009-07-211-8/+15
* Enable MSI in the MSI capability registers any time that the first messagejhb2009-06-221-1/+3
* Import ACPICA 20090521.jkim2009-06-051-1/+1
* Include <machine/stdarg.h> for va_*(). I'm not sure how this compiledjhb2009-06-021-0/+1
* Add an internal pci_printf() routine similar to device_printf() exceptjhb2009-06-011-7/+18
* Revert junk from last commit. These are WIP and not ready (and don'timp2009-05-201-87/+0
* We no longer need to use d_thread_t, migrate to struct thread *.imp2009-05-201-0/+87
* - Consolidate duplicated code for reading and sizing BARs and writing basejhb2009-04-141-121/+98
* - Fix spacing in the comment.stas2009-04-031-1/+1
* - Correct the comment.stas2009-04-031-3/+4
* Fix a buglet in revision 189401: when restoring a 64-bit BAR,marcel2009-03-101-1/+1
* Invert the logic error for the MSI/MSIX vs INTx case.rnoland2009-03-061-1/+1
* Always read/write the full 64-bit value of 64-bit BARs. Specifically,jhb2009-03-051-22/+33
* Honor the prefetchable flag in memory BARs by setting the RF_PREFETCHABLEjhb2009-03-051-2/+6
* Extend the management of PCIM_CMD_INTxDIS.rnoland2009-03-041-18/+35
* Further refine the handling of resources for BARs in the PCI bus driver.jhb2009-03-031-82/+163
* Disable INTx when enabling MSI/MSIXrnoland2009-03-021-0/+4
* Don't throw away upper 32-bits of the HT MSI address window. In practicejhb2009-02-261-1/+1
* Change the probe priority for PCI and I2C generic bus modules fromnwhitehorn2009-01-201-1/+1
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