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* Extend some 32-bit fields and variables to 64-bit to prevent overflowjimharris2013-10-081-4/+4
| | | | | | | | | | when calculating stats in nvmecontrol perftest. Sponsored by: Intel Reported by: Joe Golio <joseph.golio@emc.com> Reviewed by: carl Approved by: re (hrs) MFC after: 1 week
* Update copyright dates.jimharris2013-07-091-1/+1
| | | | MFC after: 3 days
* Change a number of malloc(9) calls to use M_WAITOK instead ofjimharris2013-03-261-4/+4
| | | | | | | | M_NOWAIT. Sponsored by: Intel Suggested by: carl Reviewed by: carl
* Create struct nvme_status.jimharris2013-03-261-2/+2
| | | | | | | | | | | | | | NVMe error log entries include status, so breaking this out into its own data structure allows it to be included in both the nvme_completion data structure as well as error log entry data structures. While here, expose nvme_completion_is_error(), and change all of the places that were explicitly looking at sc/sct bits to use this macro instead. Sponsored by: Intel Reviewed by: carl
* Revert r244549.jimharris2013-01-071-2/+2
| | | | | | | | | | | | | | | | | This change was originally intended to account for test kthreads under the nvmecontrol process, but jhb indicated it may not be safe to associate kthreads with userland processes and this could have unintended consequences. I did not observe any problems with this change, but my testing didn't exhaust the kinds of corner cases that could cause problems. It is not that important to account for these test threads under nvmecontrol, so I am just reverting this change for now. On a related note, the part of this patch for <= 7.x fails compilation so reverting this fixes that too. Suggested by: jhb
* Put kthreads under curproc so they are attached to nvmecontrol ratherjimharris2012-12-211-2/+2
| | | | | | than pid 0. Sponsored by: Intel
* This is the first of several commits which will add NVM Express (NVMe)jimharris2012-09-171-0/+305
support to FreeBSD. A full description of the overall functionality being added is below. nvmexpress.org defines NVM Express as "an optimized register interface, command set and feature set fo PCI Express (PCIe)-based Solid-State Drives (SSDs)." This commit adds nvme(4) and nvd(4) driver source code and Makefiles to the tree. Full NVMe functionality description: Add nvme(4) and nvd(4) drivers and nvmecontrol(8) for NVM Express (NVMe) device support. There will continue to be ongoing work on NVM Express support, but there is more than enough to allow for evaluation of pre-production NVM Express devices as well as soliciting feedback. Questions and feedback are welcome. nvme(4) implements NVMe hardware abstraction and is a provider of NVMe namespaces. The closest equivalent of an NVMe namespace is a SCSI LUN. nvd(4) is an NVMe consumer, surfacing NVMe namespaces as GEOM disks. nvmecontrol(8) is used for NVMe configuration and management. The following are currently supported: nvme(4) - full mandatory NVM command set support - per-CPU IO queues (enabled by default but configurable) - per-queue sysctls for statistics and full command/completion queue dumps for debugging - registration API for NVMe namespace consumers - I/O error handling (except for timeoutsee below) - compilation switches for support back to stable-7 nvd(4) - BIO_DELETE and BIO_FLUSH (if supported by controller) - proper BIO_ORDERED handling nvmecontrol(8) - devlist: list NVMe controllers and their namespaces - identify: display controller or namespace identify data in human-readable or hex format - perftest: quick and dirty performance test to measure raw performance of NVMe device without userspace/physio/GEOM overhead The following are still work in progress and will be completed over the next 3-6 months in rough priority order: - complete man pages - firmware download and activation - asynchronous error requests - command timeout error handling - controller resets - nvmecontrol(8) log page retrieval This has been primarily tested on amd64, with light testing on i386. I would be happy to provide assistance to anyone interested in porting this to other architectures, but am not currently planning to do this work myself. Big-endian and dmamap sync for command/completion queues are the main areas that would need to be addressed. The nvme(4) driver currently has references to Chatham, which is an Intel-developed prototype board which is not fully spec compliant. These references will all be removed over time. Sponsored by: Intel Contributions from: Joe Golio/EMC <joseph dot golio at emc dot com>
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