summaryrefslogtreecommitdiffstats
path: root/sys/dev/msk
Commit message (Collapse)AuthorAgeFilesLines
* Correctly check MAC running status before disabling TX/RX MACs.yongari2011-05-311-1/+1
|
* style(9)yongari2011-05-241-16/+17
|
* When MTU is changed, check whether driver should be reinitialized oryongari2011-05-231-1/+4
| | | | not. If reinitialized is required, clear driver running flag.
* Add initial support for Marvell 88E8055/88E8075 Yukon Supreme.yongari2011-05-232-4/+28
|
* Do not touch ASF related register for controllers that do not haveyongari2011-05-232-17/+25
| | | | these registers. Also disable Watchdog of ASF microcontroller.
* Make sure to enable all clocks before accessing registers.yongari2011-05-231-31/+23
| | | | | Releasing PHY from power down/COMA is done after enabling all clocks. While I'm here remove unnecessary controller reset.
* Do not configure RAM registers for controllers that do not haveyongari2011-05-231-2/+8
| | | | | them. These registers are defined only for Yukon XL, Yukon EC and Yukon FE.
* Rework store and forward configuration of TX MAC FIFO. Basically ityongari2011-05-231-23/+10
| | | | | enables store and forward mode except for jumbo frame on Yukon Ultra.
* Do not blindly clear entire GPHY control register. It seems someyongari2011-05-231-2/+2
| | | | | | | | | | bits of the register is used for other purposes such that clearing these bits resulted in unexpected results such as corrupted RX frames or missing LE status updates. For old controllers like Yukon EC it had no effect but it caused all kind of troubles on Yukon Supreme. This change shall improve stability of controllers like Yukon Ultra, Ultra2, Extreme, Optima and Supreme.
* When msk_detach() is called from msk_attach(), ifp may beglebius2011-04-251-1/+2
| | | | yet not initialized.
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-2/+2
| | | | pci_find_cap() instead.
* Introduce signed and unsigned version of CTLTYPE_QUAD, renamingmdf2011-01-191-3/+3
| | | | existing uses. Rename sysctl_handle_quad() to sysctl_handle_64().
* Fix a few more SYSCTL_PROC() that were missing a CTLFLAG type specifier.mdf2011-01-191-1/+1
|
* Fix endianness bug introduced in r205091.yongari2010-12-311-1/+1
| | | | | | | | | | | | | After controller updates control word in a RX LE, driver converts it to host byte order. The checksum value in the control word is stored in big endian form by controller. r205091 didn't account for the host byte order conversion such that the checksum value was incorrectly interpreted on big endian architectures which in turn made all TCP/UDP frames dropped. Make RX checksum offload work on any architectures by swapping the checksum value. Reported by: Sreekanth M. ( kanthms <> netlogicmicro dot com ) Tested by: Sreekanth M. ( kanthms <> netlogicmicro dot com )
* o Flesh out the generic IEEE 802.3 annex 31B full duplex flow controlmarius2010-11-141-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | support in mii(4): - Merge generic flow control advertisement (which can be enabled by passing by MIIF_DOPAUSE to mii_attach(9)) and parsing support from NetBSD into mii_physubr.c and ukphy_subr.c. Unlike as in NetBSD, IFM_FLOW isn't implemented as a global option via the "don't care mask" but instead as a media specific option this. This has the following advantages: o allows flow control advertisement with autonegotiation to be turned on and off via ifconfig(8) with the default typically being off (though MIIF_FORCEPAUSE has been added causing flow control to be always advertised, allowing to easily MFC this changes for drivers that previously used home-grown support for flow control that behaved that way without breaking POLA) o allows to deal with PHY drivers where flow control advertisement with manual selection doesn't work or at least isn't implemented, like it's the case with brgphy(4), e1000phy(4) and ip1000phy(4), by setting MIIF_NOMANPAUSE o the available combinations of media options are readily available from the `ifconfig -m` output - Add IFM_FLOW to IFM_SHARED_OPTION_DESCRIPTIONS and IFM_ETH_RXPAUSE and IFM_ETH_TXPAUSE to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so these are understood by ifconfig(8). o Make the master/slave support in mii(4) actually usable: - Change IFM_ETH_MASTER from being implemented as a global option via the "don't care mask" to a media specific one as it actually is only applicable to IFM_1000_T to date. - Let mii_phy_setmedia() set GTCR_MAN_MS in IFM_1000_T slave mode to actually configure manually selected slave mode (like we also do in the PHY specific implementations). - Add IFM_ETH_MASTER to IFM_SUBTYPE_ETHERNET_OPTION_DESCRIPTIONS so it is understood by ifconfig(8). o Switch bge(4), bce(4), msk(4), nfe(4) and stge(4) along with brgphy(4), e1000phy(4) and ip1000phy(4) to use the generic flow control support instead of home-grown solutions via IFM_FLAGs. This includes changing these PHY drivers and smcphy(4) to no longer unconditionally advertise support for flow control but only if the selected media has IFM_FLOW set (or MIIF_FORCEPAUSE is set) and implemented for these media variants, i.e. typically only for copper. o Switch brgphy(4), ciphy(4), e1000phy(4) and ip1000phy(4) to report and set IFM_1000_T master mode via IFM_ETH_MASTER instead of via IFF_LINK0 and some IFM_FLAGn. o Switch brgphy(4) to add at least the the supported copper media based on the contents of the BMSR via mii_phy_add_media() instead of hardcoding them. The latter approach seems to have developed historically, besides causing unnecessary code duplication it was also undesirable because brgphy_mii_phy_auto() already based the capability advertisement on the contents of the BMSR though. o Let brgphy(4) set IFM_1000_T master mode on all supported PHY and not just BCM5701. Apparently this was a misinterpretation of a workaround in the Linux tg3 driver; BCM5701 seem to require RGPHY_1000CTL_MSE and BRGPHY_1000CTL_MSC to be set when configuring autonegotiation but this doesn't mean we can't set these as well on other PHYs for manual media selection. o Let ukphy_status() report IFM_1000_T master mode via IFM_ETH_MASTER so IFM_1000_T master mode support now is generally available with all PHY drivers. o Don't let e1000phy(4) set master/slave bits for IFM_1000_SX as it's not applicable there. Reviewed by: yongari (plus additional testing) Obtained from: NetBSD (partially), OpenBSD (partially) MFC after: 2 weeks
* Fix typos.brucec2010-11-091-9/+9
| | | | | PR: bin/148894 Submitted by: olgeni
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-151-11/+10
| | | | | | | | | | | | | | | | | | | | | | | the NIC drivers as well as the PHY drivers to take advantage of the mii_attach() introduced in r213878 to get rid of certain hacks. For the most part these were: - Artificially limiting miibus_{read,write}reg methods to certain PHY addresses; we now let mii_attach() only probe the PHY at the desired address(es) instead. - PHY drivers setting MIIF_* flags based on the NIC driver they hang off from, partly even based on grabbing and using the softc of the parent; we now pass these flags down from the NIC to the PHY drivers via mii_attach(). This got us rid of all such hacks except those of brgphy() in combination with bce(4) and bge(4), which is way beyond what can be expressed with simple flags. While at it, I took the opportunity to change the NIC drivers to pass up the error returned by mii_attach() (previously by mii_phy_probe()) and unify the error message used in this case where and as appropriate as mii_attach() actually can fail for a number of reasons, not just because of no PHY(s) being present at the expected address(es). Reviewed by: jhb, yongari
* Catch up to rename of the constant for the Master Data Parity Error bit injhb2010-09-091-2/+2
| | | | | | | the PCI status register. Pointed out by: mdf Pointy hat to: jhb
* When VLAN hardware tagging is disabled, make sure to disable VLANyongari2010-05-041-1/+2
| | | | | | checksum offloading as well as TSO over VLAN. Reported by: jhb
* Make sure to check whether driver is running before processingyongari2010-05-041-9/+6
| | | | | | | | | | | | received frames. Also check driver has valid ifp pointer before calling msk_stop() in device_shutdown handler. While I'm here remove unnecessary accesses to interrupt mask registers in device_shutdown handler because driver puts the controller into reset state. With these changes, msk(4) now survive from heavy RX traffic(1byte UDP frame) while reboot is in progress. Reported by: Mark Atkinson < atkin901 <> gmail dot com >
* Drop driver lock before exiting from interrupt handler.yongari2010-05-041-0/+1
| | | | | Submitted by: jhb MFC after: 3 days
* Add basic support for Marvell 88E8059 Yukon Optima.yongari2010-04-302-3/+23
| | | | | Tested by: James LaLagna < jameslalagna <> gmail dot com > MFC after: 5 days
* Disable non-ASF packet flushing on Yukon Extreme as vendor's driveryongari2010-04-302-0/+7
| | | | | | | | | | | | | does. Without this change, Yukon Extreme seems to generate lots of RX FIFO overruns even though controller has available RX buffers. These excessive RX FIFO overruns generated lots of pause frames which in turn killed devices plugged into switch. It seems there is still occasional RX frame corruption on Yukon Extreme but this change seems to fix the pause frame storm. Reported by: jhb Tested by: jhb MFC after: 5 days
* Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. Ifyongari2010-04-302-4/+4
| | | | | it is 8bits register then RX FIFO size can't exceed 2KB which is not true for almost all Yukon II controller.
* With r206844, CSUM_TCP is also set for CSUM_TSO case. Modifyyongari2010-04-191-24/+24
| | | | | drivers to take into account for the change. Basically CSUM_TSO should be checked before checking CSUM_TCP.
* Partial revert r204545.yongari2010-04-071-1/+4
| | | | | | | | | | | | Just relying on status LE ownership of status block seems to cause poor performance. Always read current status index register first and then check status ownership as we had before. Accessing status index register seems to trigger immediate status update if controller have pending status updates. MFC after: 1 week Reported by: Andre Albsmeier <Andre.Albsmeier <> siemens dot com> Tested by: Andre Albsmeier <Andre.Albsmeier <> siemens dot com>
* It seems PCI_OUR_REG_[1-5] registers are not mapped on PCIyongari2010-03-141-10/+10
| | | | | | | | | | | | configuration space on Yukon Ultra(88E8056) such that accesses to these registers were NOPs which in turn make msk(4) instable on this controller. Use indirect access method to access PCI_OUR_REG_[1-5] registers. This should fix a long standing instability bug which prevented msk(4) working on Yukon Ultra. Special thanks to koitsu who gave me remote access to his system. PR: kern/114631, kern/116853 MFC after: 1 week
* Implement Rx checksum offloading for Yukon EC, Yukon Ultra,yongari2010-03-122-47/+204
| | | | | | | | | | | | | | | | | | | | Yukon FE and Yukon Ultra2. These controllers provide very simple checksum computation mechanism and it requires additional pseudo header checksum computation in upper stack. Even though I couldn't see much performance difference with/without Rx checksum offloading it may help notebook based controllers. Actually controller can compute two checksum value by giving different starting position of checksum computation on received frame. However, for long time, Marvell's checksum offloading engine have been known to have several silicon bugs so don't blindly trust computed partial checksum value. Instead, compute partial checksum twice by giving the same checksum computation position and compare the result. If the value is different it's clear indication of hardware bug. This configuration lose IP checksum offloading capability but I think it's better to take safe route. Note, Rx checksum offloading for Yukon XL was still disabled due to known silicon bug.
* Remove taskqueue based interrupt handling. After r204541 msk(4)yongari2010-03-022-155/+26
| | | | | | | | | | does not generate excessive interrupts any more so we don't need to have two copies of interrupt handler. While I'm here remove two STAT_PUT_IDX register accesses in LE status event handler. After r204539 msk(4) always sync status LEs so there is no need to resort to reading STAT_PUT_IDX register to know the end of status LE processing. Just trust status LE's ownership bit.
* Implement rudimentary interrupt moderation with programmableyongari2010-03-012-20/+23
| | | | | | | | | | | | | | | | | countdown timer register. The timer resolution may vary among controllers but the value would be represented by core clock cycles. msk(4) will automatically computes number of required clock cycles from given micro-seconds unit. The default interrupt holdoff timer value is 100us which will ensure less than 10k interrupts under load. The timer value can be changed with dev.mskc.0.int_holdoff sysctl node. Note, the interrupt moderation is shared resource on dual-port controllers so you can't use separate interrupt moderation value for each port. This means we can't stop interrupt moderation in driver stop routine. Also have msk_tick() reclaim transmitted Tx buffers as safety belt. With this change there is no need to check missing Tx completion interrupt in watchdog handler, so remove it.
* Make sure to enable flow-control only if established link isyongari2010-03-011-14/+11
| | | | | | | | full-duplex. Previously msk(4) used to allow flow-control on 1000baseT half-duplex media. Also GMAC pause is enabled if link partner is capable of handling it. While I'm here use IFM_OPTIONS instead of using IFM_GMASK to check optional flags of link.
* Properly sync status LEs after processing.yongari2010-03-011-9/+2
|
* Remove trailing white spaces.yongari2010-02-261-4/+4
|
* Allocate single MSI message. msk(4) used to allocate 2 MSI messagesyongari2010-02-262-46/+15
| | | | | | | | | | for controllers like 88E8053 which reports two MSI messages. Because we don't get anything useful things with 2 MSI messages, allocating 1 MSI message would be more sane approach. While I'm here, enable MSI for dual-port controllers too. Because status block is shared for dual-port controllers, I don't think msk(4) will encounter problem for using MSI on dual-port controllers.
* Don't hardcod register offset to set PCIe max read request size.yongari2010-02-262-29/+20
| | | | | | | | | | The register offset is not valid on 88E8072 controller. Also don't blindly increase max read request size to 4096, instead, use 2048 which seems to be more sane value and only change the value if the hardware default size(512) was used on that register. For PCIX controllers, use system defined constant rather than using magic value. While I'm here stop showing negotiated link width.
* Optimize inserting LE for TX checksum computation. Controller doesyongari2010-02-262-10/+17
| | | | | | | | not require checksum LE configuration if checksum start and write position is the same as before. So keep track last checksum start and write position and insert new LE whenever the position is changed. This reduces number of LEs used in TX path as well as slightly enhance TX performance.
* Add TSO support on VLANs. Controller requires VLAN hardware taggingyongari2010-02-261-6/+11
| | | | to make TSO work over VLANs.
* Reuse the configured LE for VLAN if new LE was created for TSO.yongari2010-02-261-1/+1
| | | | | Only old controllers need to create new LE for TSO. This change makes TSO work over VLANs.
* Correct inversed programming of ethernet hardware address onyongari2010-02-201-10/+16
| | | | | | big-endian architecture. Submitted by: C. Jayachandran <c.jayachandran at gmail dot com> (initial version)
* Yukon Ultra2 has 126MHz clock.yongari2010-01-221-1/+1
|
* s/Mhz/MHz/gyongari2010-01-221-8/+8
| | | | Submitted by: N.J. Mann <njm <> njm dot me dot uk >
* It seems generation of link state change of e1000phy(4) is notyongari2009-11-171-0/+2
| | | | | | | | | | reliable on some Marvell PHYs. If msk(4) know it still does not have established link check whether msk(4) missed the link state change by looking into polled link state. Reported by: Mel Flynn < mel.flynn+fbsd.current <> mailing.thruhere dot net >, Gleb Kurtsou <gleb.kurtsou <> gmail dot com > Tested by: Gleb Kurtsou <gleb.kurtsou <> gmail dot com >
* Add preliminary Yukon Ultra 2 support(88E8057). The controlleryongari2009-11-072-2/+15
| | | | | | looks very similar to Yukon EC Ultra. Tested by: kalin m ( kalin <> el dot net )
* Take a step towards removing if_watchdog/if_timer. Don't explicitly setjhb2009-11-061-2/+0
| | | | | | | if_watchdog/if_timer to NULL/0 when initializing an ifnet. if_alloc() sets those members to NULL/0 already. (Missed this driver in the earlier commit.)
* It's normal to see Rx FIFO overruns under high network load andyongari2009-11-061-3/+1
| | | | | | | | showing the message creates other side-effects. Remove the Rx FIFO overrun message in interrupt handler. msk(4) should recover from the FIFO overruns without any user intervention. Users can still check the Rx FIFO overrun counter from MAC MIB statistics maintained in driver(dev.msk.0.stats.rx.overflows).
* Remove unnecessary header file.yongari2009-11-061-1/+0
|
* - Add support for Marvell Yukon 88E8042 device.lulf2009-10-252-0/+3
| | | | | Submitted by: Mario Lobo <mlobo -at- digiart.art.br> Approved by: yongari
* Add DGE-560SX(Yukon XL) to the supported device list. Many thanksyongari2009-09-282-0/+3
| | | | | to "Eugene Perevyazko <john <> dnepro dot net>" who kindly gave remote access to system with DGE-560SX.
* Add workaround for Yukon XL which has hardware bug that can't flushyongari2009-09-281-3/+8
| | | | FIFO.
* Add hack to pass controller specific information to phy driver.yongari2009-09-282-15/+25
| | | | | | | | | Unlike most other PHYs there is no easy way to know which media type the PHY supports on Marvell PHYs. MIIF_HAVEFIBER flags is now passed via bus-specific instance variable of a device. While I'm here add 88E1112 specific work around to set SIGDET polarity low. Many thanks "Eugene Perevyazko <john <> dnepro dot net>" who kindly gave remote access to system with DGE-560SX.
OpenPOWER on IntegriCloud