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* Add support for the BCM5703x chips. I do not have one of thesejdp2002-09-083-0/+9
| | | | | | | | cards to test; however the submitter reports that this patch works with the on-board interface on the IBM x235 server. Submitted by: Jung-uk Kim <jkim@niksun.com> MFC after: 1 month
* Revert change to detect multiply PHYs in mii code. There might be casesambrisko2002-08-161-5/+2
| | | | | | | | | when this is needed. Work around bogus second PHY in the DFE-580 card via a change in the if_ste.c driver. Suggested by: jdp Reviewed by: jdp MFC after: 3 days
* Only attach one PHY device to a controller. NetBSD has similar code.ambrisko2002-08-071-2/+5
| | | | | | | | The D-Link DFE-580 card will otherwise show 2 miibuses for each controller and therefore 2 ukphy's. Sponsored by: Vernier Networks MFC after: 1 week
* regeneratebenno2002-07-051-3/+9
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* Add a driver for the Broadcom BCM52xx "mini-theta" PHY. This includes thebenno2002-07-053-0/+483
| | | | | | | | | | | | | internal PHY on the 3COM 3C905B and 3C905C parts, however I've rigged it so that xlphy (aka exphy) takes precedence for the time being. If people try this with their xl cards and decide that it's a better choice, we can switch this later. This is the PHY used in various iMacs and possibly other GMAC-equipped Macintoshes with 10/100 PHYs (the ones with 10/100/1000 appear to use brgphy). Obtained from: NetBSD
* Use 3C905C instead of 3c905Cphy as the identifier for the Broadcom PHY usedbenno2002-07-052-3/+3
| | | | | | in the 3C905C. This is mainly cosmetic. I'm doing this mainly so we share the same identifier as NetBSD.
* Increase gigE negotiation timeout to 17 seconds.phk2002-05-041-5/+5
| | | | | 10 seconds is not enough to negotiate a gigE link with a cisco switch which holds carrier off for several seconds between tries.
* Clean up mii/phy drivers: Remove the MIIF_DOINGAUTO which doesn't reallyphk2002-05-0416-331/+115
| | | | | do anything at the end of the day except bloat the drivers which has copy&pasted it.
* MII_TICK handlers need not restart aneg on these PHYs, they behave prettysemenu2002-05-012-109/+55
| | | | | | | | | | | | well as is, so - just fetch current status upon MII_TICK. Also do IFM_INST verification at the top of *_service() then doing it separately for every case in switch. acphy: do not read MII_ACPHY_DIAG twice, there is nothing latching. qsphy: always fetch actual link status from MII_QSPHY_PCTL. MFC after: 1 week
* Introduce NetBSD's mii_phy_match() API and use it in the nsgphy tophk2002-04-293-10/+45
| | | | get a description printed.
* Convert exphy and ukphy over to the new code.phk2002-04-293-61/+10
| | | | exphy is done flying blind, ukphy is tested on one card.
* Make one generic mii_phy_detach() to replace 19 slightly different ones.phk2002-04-2922-339/+61
| | | | | | | Rename mii_phy_auto_stop() mii_phy_down(). Introduce mii_down(), use it from nge. Do not indirect it to 19 identical case's in 19 switchstatements like NetBSD did.
* Move a lot closer to NetBSDs MII support for GigE.phk2002-04-296-289/+244
| | | | Move fxp and nge drivers over to use the new stuff.
* Moving closer to being able to use NetBSD's generic mii_set_media()phk2002-04-293-20/+141
| | | | function.
* Edging ever closer to NetBSD...phk2002-04-293-12/+11
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* Move us yet closer to IFM_* definitions in NetBSD.phk2002-04-291-2/+2
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* Follow NetBSD and s/IFM_1000_TX/IFM_1000_T/phk2002-04-283-16/+16
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* Don't pass three args when one will do just fine, and even preventphk2002-04-2817-22/+27
| | | | mistakes like the one brgphy.c (now corrected).
* Improve an API by about 4 lines per driver.phk2002-04-2815-59/+19
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* Use generic MII #defines instead of private ones when the registersphk2002-04-282-169/+67
| | | | | | are IEEE defined. Object file comes out the same.
* Merge in rev 1.9 from NetBSD.phk2002-04-281-3/+81
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* Work around an Intel 21143 chip bug.mckay2002-04-181-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rev 1.56 of if_dc.c removed calls to mii_pollstat() from the dc_tick() routine. dc_tick() is called regularly to detect link up and link down status, especially when autonegotiating. The expectation was that mii_tick() (which is still called from dc_tick()) would update status information automatically in all cases where it would be sensible to do so. Unfortunately, with authentic 21143 chips this is not the case, and the driver never successfully autonegotiates. This is because (despite what it says in the 21143 manual) the chip always claims that link is not present while the autonegotiation enable bit is set. Autonegotation takes place and succeeds, but the driver tests the link bits before it switches off the autonegotiation enable bit, and success is not recognised. The simplest solution is to call dcphy_status() more often for MII_TICK calls by dropping out of the switch statement instead of exiting when we are autonegotiating and link appears to not be present. When autonegotiation succeeds, dcphy_status() will note the speed and fdx/hdx state and turn off the autonegotiation enable bit. The next call to dcphy_status() will notice that link is present, and the dc driver code will be notified. Macronix chips also use this code, but implement link detection as described in the manual, and hence don't need this patch. However, tests on a Macronix 98715AEC-C show that it does not adversely affect them. This could be done better but is the minimal effective change, and most closely mimics what was happening prior to rev 1.56 of if_dc.c. (Actually I also deleted a small amount of unnecessary code while I was in the area.) Reviewed by: wpaul
* Regenerate.wpaul2002-04-071-1/+6
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* Teach the rlphy driver how to do parallel link detection. If the link partnerwpaul2002-04-072-1/+117
| | | | | | | | | | | | | | | doesn't support NWAY, the RealTek PHY (both the integrated ones on 8139 chips and the RTL8201L 10/100 PHY) will not report the link speed via the ANLPAR or BMSR registers. For the 8201L, we need to look in magic vendor-specific PHY register 0x19. For the 8139 MAC+PHY combo, we have to be able to test the RL_MEDIASTAT register. The changes to rlphy.c are based largely on the patch from PR 30836, however I tried to eliminate some magic numbers by creating an entry for the 8201 PHY in miidevs. Also updated if_rl.c to allow the rlphy driver to read the RL_MEDIASTAT register via the rl_miibus_readreg() routine.
* regeneratewpaul2002-03-221-1/+3
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* Teach the brgphy driver about the BCM5701's internal copper PHY.wpaul2002-03-222-0/+7
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* Remove __P.alfred2002-03-2020-122/+121
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* Remove problematic PHY_WRITE so that autoneg to 10 Mbpsdanny2002-02-271-16/+1
| | | | | | | | actually works. Submitted by: Dennis <TD790@aol.com> Reviewed by: Bill Paul <wpaul@freebsd.org> MFC after: 7 days
* Fix reversed definitions for the bits that select half vs. full duplex.archie2002-01-101-4/+4
| | | | Submitted by: Darren Croke <djc@packetdesign.com>
* Fix declaration disagreement.mjacob2001-10-111-2/+2
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* Note the 'common knowledge' assumption that each NIC's softc startsmjacob2001-10-011-0/+9
| | | | | | | | | with an ifnet structure (so device_get_softc will get one). If memory allocation fails in mii_phy_probe, don't just march ahead into a panic- return ENOMEM. MFC after: 1 week
* Cleanup pass for mii drivers.jlemon2001-09-2921-512/+214
| | | | | | | . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
* Change the order that we print the media options during device probe tojlemon2001-09-291-30/+24
| | | | match the other mii drivers.
* Add field for last active status, as well as function prototypes.jlemon2001-09-291-0/+3
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* Add new device method miibus_linkchg, along with a service routine.jlemon2001-09-293-0/+102
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* Fix typo: BGGPHY -> BRGPHY in one of the #defines I added the other day.wpaul2001-09-271-1/+1
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* Add some definitions for the DSP programming registers in the BCM5400wpaul2001-09-251-0/+38
| | | | and BCM5401 PHYs.
* Tweak the autoneg kickoff code to that it more closely resembles thewpaul2001-09-181-3/+16
| | | | method uses in the nsgphy driver.
* Regenerate.wpaul2001-09-041-1/+5
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* Add support for the BCM5401 and BCM5411 10/100/1000Mbps copper gigE PHYs.wpaul2001-09-043-26/+79
| | | | | This basically updates the brgphy driver to support 10/100 modes in addition to 1000Mbps modes.
* Quiet a variable format-string warning.kris2001-07-191-1/+1
| | | | MFC after: 1 week
* Only touch the PCR register in order to set bits for the fxp driver.jlemon2001-06-021-1/+3
| | | | | | | The 3C509-TX card apparently had a slightly different version of the chip, and has problems when this register is set. The problem does not appear on the 3C509{BC} cards, but since only the fxp driver needs specific bits set, conditionalize on that.
* Regeneratewpaul2001-05-231-1/+6
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* Tweak the xmphy driver a little bit based on something I learned aboutwpaul2001-05-233-8/+23
| | | | | | | | | | | | | | | | | | | | | | | the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
* Regenerate.jlemon2001-05-111-3/+7
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* Correctly recognize the i82562{EM} PHYs.jlemon2001-05-112-15/+20
| | | | Obtained from: OpenBSD
* Regeneratewpaul2001-05-111-1/+5
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* Add support for gigabit ethernet cards based on the NatSemi DP83820wpaul2001-05-113-0/+645
| | | | | | | | | | | | | | | | | | | and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
* Add Marvell PHY support for 10/100/1000 LIVENGOOD_CU Intel NIC.mjacob2001-04-094-0/+768
| | | | | | Parag Patel did all of the grunt work, so he gets the credit. Register definitions and actions inferred from a Linux driver, so Intel also gets some 'credit'.
* Catch up to header include changes:jhb2001-03-282-0/+2
| | | | | - <sys/mutex.h> now requires <sys/systm.h> - <sys/mutex.h> and <sys/sx.h> now require <sys/lock.h>
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