| Commit message (Collapse) | Author | Age | Files | Lines |
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FE+ controller. Due to the severe silicon bugs for Yukon FE+,
88E3016 seems to require more workarounds. However I'm not sure
whether the workaround is PHY specific or only applicable to Yukon
FE+. The datasheet for the PHY is publicly available but it lacks
several details for the workaround used in this change. The
workaround information was obtained from Linux. Many thanks to
Yukon FE+ users who helped me add 88E3016 support.
Tested by: bz, Tanguy Bouzeloc ( the.zauron <> gmail dot com )
Bruce Cran ( bruce <> cran dot org dot uk )
Michael Reifenberger ( mike <> reifenberger dot com )
Stephen Montgomery-Smith ( stephen <> missouri dot edu )
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advertisement register. Some PHYs such as 88E3016 requires NEXT
Page capability to establish valid link. Also set protocol selector
field which is read only but it makes the intention clearer.
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is valid only for auto-negotiation case so check the bit if we know
auto-negotiation is active. While I'm here explicitly checks
current speed with speed mask and set IFM_NONE if resolved speed
is unknown.
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checks extended status register to see whether the PHY is fast
ethernet or not. This removes a lot of checks for specific PHY
models and it makes easy to add more PHYs to e1000phy(4).
While I'm here remove setting mii_anegticks as it is set with
mii_phy_add_media().
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number of quirks for this device, and this implements just the basics.
The 2.5s powerdown recommended in the datasheet will be next...
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get default next page configuration. While I'm here explicitly set
IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set
by hardware so setting it has no effect but it would clear the
intention. With this change controllers that couldn't establish
1000baseT link should work.
PR: kern/130846
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While I'm here, don't set mii_anegticks as it's set by
mii_phy_add_media().
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it seems to be possible to collide with FRAMELEN from machine/frame.h.
Found by: zec
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establishment of 10/100Mbps link on Atheros AR8121(L1E).
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not recognized by ciphy(4) due to the incorrect OUI.
Reported by: nork
Tested by: nork
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bank instead of copper/fiber bank which in turn resulted in
wrong registers were accessed during PHY operation. It is
believed that page 0 should be used for copper PHY so reinitialize
E1000_EADR to select default copper PHY.
This fixes link establishment issue of nfe(4) on Sun Fire X4140.
OpenBSD also has similimar patch but they just reset the E1000_EADR
register to page 0. However some Marvell PHYs((88E3082, 88E1000)
don't have the extended address register and the meaning of the
register is quite different for each PHY model. So selecting copper
PHY is limited to 88E1149 PHY which seems to be the only one that
exhibits link establishment problem. If parent device know the type
of PHY(either copper or fiber) that information should be notified
to PHY driver but there is no good way to pass this information yet.
Reported by: thompsa
Reviewed by: thompsa
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Asus EeePC and some Asus mainboards.
Reviewed by: yongari, rpaulo, jhb
Tested by: many
Approved by: kib (mentor)
MFC after: 1 week
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only mode and restore original value of extended address register
instead of overwriting it with page 1. There are still instance
information passing issue(e.g configured media type: fiber or
copper) from driver to PHY layer but this change make the selected
PHY work with 88E1112 PHY.
Reported by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
Tested by: Krzysztof Jedruczyk < beaker <at> hot dot pl >
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HW donated by: nork
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Obtained from: Semihalf
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sure we get the error handling right in both places. This also
simplifies the code somewhat.
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When there's an error, we don't want to free the children, since it
will be stack garbage. While we did fail to dereference it by setting
devs to 0, we didn't fail to call free. We never failed to fail, it
was the easiest thing to do.
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to do here is nothing in that case...
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Also report current link state while auto-negotiation is in
progress.
With this change link loss should be reported within a second
and drivers that rely on link state should work.
Reported by: Pete French < petefrench at ticketswitch dot com >
Tested by: Pete French < petefrench at ticketswitch dot com >
MFC after: 1 week
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Disable advanced link-down power saving in phy reset.
Reported by: nork
Tested by: nork
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Ethernet device driver, written by sephe@
Obtained from: DragonFly
Sponsored by: iXsystems
MFC after: 2 weeks
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Ethernet device driver, written by sephe@
Obtained from: DragonFly
Sponsored by: iXsystems
MFC after: 2 weeks
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MFC after: 2 weeks
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found on various Apple G3 models.
Submitted by: Nathan Whitehorn
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sn(4) driver and also looking at newer drivers. The reason for the rewrite is
to support MII and to try and resolve some performance issues found when trying
to use the sn(4) driver on the Gumstix network boards.
For reference, the SMSC LAN91C111 is a non-PCI ethernet part whose lineage
dates back to Ye Olde Days of ISA. It seems to get some use in the embedded
space these days on parts lacking on-board MACs or on-board PCI controllers,
such as the XScale PXA line of ARM CPUs.
This also includes a driver for the SMSC LAN83C183 10/100 PHY.
Man page to follow.
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10/100 operation and place the mailbox registers at a different offset.
They also do not have an EEPROM, so the MAC address must be read from
NVRAM instead.
MFC after: 1 month
PR: kern/118975
Submitted by: benjsc, Thomas Nyström thn at saeab dot se
Submitted by: sephe (original patch for DragonflyBSD)
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development systems).
Obtained from: Freescale, Semihalf
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Tested by: Stuart Fraser < stuart AT stuartfraser DOT net >
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the specific ASIC revision.
MFC after: 1 week
Obtained from: OpenBSD (mii/phy bits)
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MFC after: 1 week
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PR: kern/76710
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This PHY is found on many embedded development boards: among others MPC8555CDS
evaluation systems use it.
Approved by: cognet (mentor)
MFp4: e500
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- Fix whitespace according to style(9).
- Sync the comment describing why we have to wait in nsphy_reset()
with nsphyter_reset(). It's true that the manual tells to not do a
reset within 500us of applying power but that's unlikely the cause
of problems seen here. Generally having to wait 500us after a reset
however is.
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DP83847 PHYs. The main reason for using a specific driver for these
PHYs are reset quirks similar to the nsphy(4) driven DP83840A.
PR: 112654
Obtained from: NetBSD
MFC after: 2 weeks
Thanks to: mlaier for testing w/ DP83815
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The idea was taken from OpenBSD and cross-referenced with Linux driver.
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