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* MFC r263957:yongari2014-04-141-1/+1
| | | | | | | | Increase the number of TX DMA segments from 32 to 35. It turned out 32 is not enough to support a full sized TSO packet. While I'm here fix a long standing bug introduced in r169632 in bce(4) where it didn't include L2 header length of TSO packet in the maximum DMA segment size calculation.
* Change local variable tso_segsz to tsosegsz to avoid mbuf.h macro conflicts.andre2013-08-241-4/+4
| | | | Sponsored by: The FreeBSD Foundation
* Mechanically substitute flags from historic mbuf allocator withglebius2012-12-041-3/+3
| | | | malloc(9) flags in sys/dev.
* Align the PCI Express #defines with the style used for the PCI-Xgavin2012-09-181-1/+1
| | | | | | | | | | | | | | | | | #defines. This also has the advantage that it makes the names more compact, iand also allows us to correct the non-uniform naming of the PCIM_LINK_* defines, making them all consistent amongst themselves. This is a mostly mechanical rename: s/PCIR_EXPRESS_/PCIER_/g s/PCIM_EXP_/PCIEM_/g s/PCIM_LINK_/PCIEM_LINK_/g When this is MFC'd, #defines will be added for the old names to assist out-of-tree drivers. Discussed with: jhb MFC after: 1 week
* Fix a logic error when use PCIY_PMG capabilitykevlo2012-06-071-1/+1
| | | | Reviewed by: yongari
* - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOPmarius2011-05-031-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-4/+4
| | | | pci_find_cap() instead.
* - Add a locked variant of jme_start() and invoke it directly while holdingjhb2011-01-132-25/+22
| | | | | | | | | | | the lock instead of queueing it to a task. - Do not invoke jme_rxintr() to reclaim any unprocessed but received packets when shutting down the interface. Instead, just drop these packets to match the behavior of other drivers. - Hold the driver lock in the interrupt handler to avoid races with ioctl requests to down the interface. Reviewed by: yongari
* Add support for JMicron JMC251/JMC261 Gigabit/Fast ethernetyongari2010-12-183-36/+355
| | | | | | | | | | | | | | | | | | | | controller with Card Read Host Controller. These controllers are multi-function devices and have the same ethernet core of JMC250/JMC260. Starting from REVFM 5(chip full mask revision) controllers have the following features. o eFuse support o PCD(Packet Completion Deferring) o More advanced PHY power saving Because these controllers started to use eFuse, station address modified by driver is permanent as if it was written to EEPROM. If you have to change station address please save your controller default address to safe place before reprogramming it. There is no way to restore factory default station address. Many thanks to JMicron for continuing to support FreeBSD. HW donated by: JMicron
* Use system defined PCIR_EXPRESS_DEVICE_CTL instead of using magicyongari2010-12-181-1/+1
| | | | number.
* Make sure whether driver allocated resource before releasing it.yongari2010-12-181-2/+4
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* Fix a regression introduced in r213893. FPGA version requires PHYyongari2010-12-181-2/+3
| | | | probing so allow PHY probing on all possible addresses.
* Consistently put a tab character between #define and the macro name.yongari2010-12-181-14/+14
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* Remove unecessary and clearly wrong usage of atomic(9).yongari2010-12-101-7/+5
| | | | Reported by: avg, jhb, attilio
* Enable ethernet flow-control on all jme(4) controllers.yongari2010-11-261-3/+1
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* Allocate 1 MSI/MSI-X vector. Originally jme(4) was designed toyongari2010-11-261-28/+12
| | | | | | | support multi-queue but the hardware limitation made it hard to implement supporting multi-queue. Allocating more than necessary vectors is resource waste and it can be added back when we implement multi-queue support.
* Disable retrying RX descriptor loading. The counter is used to setyongari2010-11-261-2/+2
| | | | | | | | | | number of retry to be performed whenever controller found RX descriptor was empty. RX empty interrupt is generated only when the retry counter is over. Experimentation shows retrying RX descriptor loading increased number of dropped frames under flow-control enabled environments so disable it and have controller generate RX empty interrupt as fast as it can. While I'm here fix RXCSR_DESC_RT_CNT macro.
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-151-17/+9
| | | | | | | | | | | | | | | | | | | | | | | the NIC drivers as well as the PHY drivers to take advantage of the mii_attach() introduced in r213878 to get rid of certain hacks. For the most part these were: - Artificially limiting miibus_{read,write}reg methods to certain PHY addresses; we now let mii_attach() only probe the PHY at the desired address(es) instead. - PHY drivers setting MIIF_* flags based on the NIC driver they hang off from, partly even based on grabbing and using the softc of the parent; we now pass these flags down from the NIC to the PHY drivers via mii_attach(). This got us rid of all such hacks except those of brgphy() in combination with bce(4) and bge(4), which is way beyond what can be expressed with simple flags. While at it, I took the opportunity to change the NIC drivers to pass up the error returned by mii_attach() (previously by mii_phy_probe()) and unify the error message used in this case where and as appropriate as mii_attach() actually can fail for a number of reasons, not just because of no PHY(s) being present at the expected address(es). Reviewed by: jhb, yongari
* Make sure to not use stale ip/tcp header pointers. The ip/tcpyongari2010-10-141-1/+2
| | | | | | | | | | | header parser uses m_pullup(9) to get access to mbuf chain. m_pullup(9) can allocate new mbuf chain and free old one if the space left in the mbuf chain is not enough to hold requested contiguous bytes. Previously drivers can use stale ip/tcp header pointer if m_pullup(9) returned new mbuf chain. Reported by: Andrew Boyer (aboyer <> averesystems dot com) MFC after: 10 days
* Add TSO support on VLANs. jme(4) controllers do not require VLANyongari2010-02-221-1/+4
| | | | hardware tagging to make TSO work over VLANs.
* If we fail to read the Ethernet address from the card, just print angavin2010-01-081-9/+1
| | | | | | | | | | | warning message and attach without setting the Ethernet address to a random address. It is not believed that this code can actually be executed, and if it does, we're better off printing an error message than faking up an Ethernet address. PR: kern/133239 Reviewed by: yongari (earlier version of patch) Approved by: ed (mentor)
* Set the locally-assigned bit in the randomly generated Ethernet addressgavin2009-12-251-1/+1
| | | | | | | | | if we end up having to generate one. PR: kern/133239 Discussed with: yongari Approved by: ed (mentor) MFC after: 2 weeks
* Remove unnecessary device reinitialization.yongari2009-09-281-2/+14
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* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/rwatson2009-06-261-2/+2
| | | | | | | | | | | | | IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks
* Add HW MAC counter support for newer JMC250/JMC260 revisions.yongari2008-12-043-24/+197
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* Add support for newer JMC250/JMC260 revisions.yongari2008-12-043-22/+76
| | | | | | | | | | | | | | | | | | | | | | o Chip full mask revision 2 or later controllers have to set correct Tx MAC and Tx offload clock depending on negotiated link speed. o JMC260 chip full mask revision 2 has a silicon bug that can't handle 64bit DMA addressing. Add workaround to the bug by limiting DMA address space to be within 32bit. o Valid FIFO space of receive control and status register was changed on chip full mask revision 2 or later controllers. For these controllers, use default 16QW as it's supposed to be the safest value for maximum PCIe compatibility. JMicron confirmed performance will not be reduced even if the FIFO space is set to 16QW. o When interface is put into suspend/shutdown state, remove Tx MAC and Tx offload clock to save more power. We don't need Tx clock at all in this state. o Added new register definition for chip full mask revision 2 or later controllers. Thanks to JMicron for their continuous support of FreeBSD.
* Make sure to read the last byte of EEPROM descriptor. Previouslyyongari2008-10-141-5/+5
| | | | | | | | | the last byte of the ethernet address was not read which in turn resulted in getting 5 out of the 6 bytes of ethernet address and always returned ENOENT. I did not notice the bug on FPGA version because of additional configuration data in EEPROM. Pointed out by: bouyer at NetBSD
* Read PCI device id instead of PCI revision id. Also checks the readyongari2008-10-132-2/+4
| | | | | | | device id is JMC260 family. Previously it just verified the deivce is JMC260 Rev A0. This will make it easy for newer JMC2xx support. Pointed out by: bouyer at NetBSD
* Add workaround for occasional packet loss issue of JMC250 A2yongari2008-09-222-3/+20
| | | | | | | | when it runs on half-duplex media. While I'm here add register definition for GPREG1. ATM the GPREG1 register is only valid for JMC250 A1/A2. Submitted by: Ethan at JMicron
* Add workaround for CRC errors seen at 100Mbps on JMC250 A2.yongari2008-09-092-2/+16
| | | | | While here update chip revision number of JMC250/JMC260 from the latest datasheet.
* Fix typo.yongari2008-09-091-1/+1
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* Fix buffer discard index.yongari2008-07-281-1/+4
| | | | | | | | | While I'm here dicard all buffers if errored frame is part of multi-segmented frames. Pointed out by: sephe Reviewd by: sephe MFC after: 3 days
* Correct 1000Mbps link handling logic for JMC250. This should makeyongari2008-07-181-1/+1
| | | | jme(4) run on 1000Mbps link.
* Add driver support for PCIe adapters based on JMicron JMC250yongari2008-05-273-0/+4325
gigabit ethernet and JMC260 fast ethernet controllers. ATM jme(4) supports all hardware features except RSS and multiple Tx/Rx queue. In these days most ethernet controller vendors take a ply of concealing hardware detailes from open source developers. As contrasted with these vendors JMicron provided all necessary information needed to write a stable driver during driver writing and answered many questions I had. They even helped fixing driver bugs with protocol analyzer. Many thanks to JMicron for their support of FreeBSD. H/W donated by: JMicron
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