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* Clean up a switch statement for uncore events on Westmere processors.gnn2012-01-132-12/+3
| | | | | | Submitted by: Davide Italiano Reviewed by: gnn MFC after: 1 week
* Update PMC events from October 2011 Intel documentation.fabient2012-01-042-12/+11
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days
* Add missing MSR programming for some events.fabient2012-01-043-6/+61
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days
* In sys/dev/hwpmc/hwpmc_amd.c, fix a clang warning about invalid enumdim2011-12-311-3/+1
| | | | | | | conversions. Reviewed by: jkoshy MFC after: 1 week
* Quite the tinderbox for the holidays. Remove the assert[1].bz2011-12-251-5/+0
| | | | | Suggested by: jhibbits [1] MFC after: 3 days
* Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).jhibbits2011-12-242-10/+1029
| | | | | | | Sampling is in progress. Approved by: nwhitehorn (mentor) MFC after: 9.0-RELEASE
* - Remove extra spaceeadler2011-12-211-1/+1
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> Approved by: brucec
* There's a small set of events on Nehalem, that are not supported infabient2011-12-121-1/+12
| | | | | | | | | processors with CPUID signature 06_1AH, 06_1EH, and 06_1FH. Refuse to allocate them on unsupported model. Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 1 month
* Update Westmere uncore event exception list.fabient2011-12-021-0/+8
| | | | | Submitted by: Davide Italiano <davide italiano at gmail com> MFC after: 1 week
* Flip on processing interrupt profile events for mips24k.adrian2011-11-091-1/+61
| | | | | | | | | | | This is a bit hackish and should be made more generic (ie, support more than two hard-coded performance counter+config register pairs) so it can be used for mips74k and other chips. All this does is process the initial interrupt event. It doesn't (yet) handle callgraph events, so even if you route the exception/interrupt to this routine and flip the bit on, it will hang and crash pmc unless you disable callgraph support when you enable a sample based PMC.
* Add a flush of the current PMC log buffer before displaying the next top.fabient2011-10-182-18/+61
| | | | | | | | As the underlying block is 4KB if the PMC throughput is low the measurement will be reported on the next tick. pmcstat(8) use the modified flush API to reclaim current buffer before displaying next top. MFC after: 1 month
* Begin implementing correct MIPS24K sampling mode behaviour.adrian2011-10-071-4/+7
| | | | | | | | * Add the interrupt bit in the configuration register * Correctly set the counter register for the sampling overflow interrupt. The interrupt is asserted when bit 31 is set. So set the overflow value at 0x80000000 and subtract the programmed value as appropriate.
* In order to maximize the re-usability of kernel code in user space thiskmacy2011-09-162-3/+3
| | | | | | | | | | | | | patch modifies makesyscalls.sh to prefix all of the non-compatibility calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel entry points and all places in the code that use them. It also fixes an additional name space collision between the kernel function psignal and the libc function of the same name by renaming the kernel psignal kern_psignal(). By introducing this change now we will ease future MFCs that change syscalls. Reviewed by: rwatson Approved by: re (bz)
* Second-to-last commit implementing Capsicum capabilities in the FreeBSDrwatson2011-08-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel for FreeBSD 9.0: Add a new capability mask argument to fget(9) and friends, allowing system call code to declare what capabilities are required when an integer file descriptor is converted into an in-kernel struct file *. With options CAPABILITIES compiled into the kernel, this enforces capability protection; without, this change is effectively a no-op. Some cases require special handling, such as mmap(2), which must preserve information about the maximum rights at the time of mapping in the memory map so that they can later be enforced in mprotect(2) -- this is done by narrowing the rights in the existing max_protection field used for similar purposes with file permissions. In namei(9), we assert that the code is not reached from within capability mode, as we're not yet ready to enforce namespace capabilities there. This will follow in a later commit. Update two capability names: CAP_EVENT and CAP_KEVENT become CAP_POST_KEVENT and CAP_POLL_KEVENT to more accurately indicate what they represent. Approved by: re (bz) Submitted by: jonathan Sponsored by: Google Inc
* Commit the support for removing cpumask_t and replacing it directly withattilio2011-05-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpuset_t objects. That is going to offer the underlying support for a simple bump of MAXCPU and then support for number of cpus > 32 (as it is today). Right now, cpumask_t is an int, 32 bits on all our supported architecture. cpumask_t on the other side is implemented as an array of longs, and easilly extendible by definition. The architectures touched by this commit are the following: - amd64 - i386 - pc98 - arm - ia64 - XEN while the others are still missing. Userland is believed to be fully converted with the changes contained here. Some technical notes: - This commit may be considered an ABI nop for all the architectures different from amd64 and ia64 (and sparc64 in the future) - per-cpu members, which are now converted to cpuset_t, needs to be accessed avoiding migration, because the size of cpuset_t should be considered unknown - size of cpuset_t objects is different from kernel and userland (this is primirally done in order to leave some more space in userland to cope with KBI extensions). If you need to access kernel cpuset_t from the userland please refer to example in this patch on how to do that correctly (kgdb may be a good source, for example). - Support for other architectures is going to be added soon - Only MAXCPU for amd64 is bumped now The patch has been tested by sbruno and Nicholas Esborn on opteron 4 x 12 pack CPUs. More testing on big SMP is expected to came soon. pluknet tested the patch with his 8-ways on both amd64 and i386. Tested by: pluknet, sbruno, gianni, Nicholas Esborn Reviewed by: jeff, jhb, sbruno
* Fix a typo/error.attilio2011-04-301-1/+1
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* Remove unnecessary usage of memory barriers when dealing withattilio2011-04-301-3/+3
| | | | | | pmc_cpumask. Discussed with: fabient
* Fix two aliases that had the same name but were pointing to differentgnn2010-10-041-2/+2
| | | | | | events. These are now disamiguated. MFC after: 1 week
* Fix invalid class removal when IAF is not the last class.fabient2010-09-051-15/+2
| | | | | | Keep IAF class with 0 PMC and change the alias in libpmc to IAP. MFC after: 1 week
* Make sure that we clear the correct bits when we turn offgnn2010-07-292-21/+34
| | | | | | | | | | | a PMC. It was possible that we could have turned a bit on but never cleared it. Extend the calls to rdmsr() to all necessary functions, not just those which previously caused a panic. Pointed out by: jhb@ MFC after: 1 week
* Fix a panic brought about by writing an MSR without a proper mask.gnn2010-07-132-13/+86
| | | | | | | | | All of the necessary wrmsr calls are now preceded by a rdmsr and we leave the reserved bits alone. Document the bits in the relevant registers for future reference. Tested by: mdf MFC after: 1 week
* Convert pm_runcount to int to correctly check for negative value.fabient2010-06-051-8/+5
| | | | | | | Remove uncessary check for error. Found with: Coverity Prevent(tm) MFC after: 1 month
* When configuring a system-wide couting PMC, hwpmc was incorrectly logging ↵rstone2010-05-011-9/+9
| | | | | | | | | process mappings for that PMC. Nothing ever reads pmc logs out of a counting PMC, so the log buffers were leaked when the PMC was deconfigured. The process mappings are only useful for sampling PMCs anyway, so only log the mappings if the PMC is a sampling PMC. This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs. Approved by: jkoshy (mentor) MFC after: 2 weeks
* - Fix a typo OFFCORE_REQUESTS.ANY.RFO is B0H10H and not 80H10H.fabient2010-04-152-2/+3
| | | | | | - Enable missing PARTIAL_ADDRESS_ALIAS for Core i7. MFC after: 3 days
* - Support for uncore counting events: one fixed PMC with the uncorefabient2010-04-026-977/+3467
| | | | | | | | | | | | domain clock, 8 programmable PMC. - Westmere based CPU (Xeon 5600, Corei7 980X) support. - New man pages with events list for core and uncore. - Updated Corei7 events with Intel 253669-033US December 2009 doc. There is some removed events in the documentation, they have been kept in the code but documented in the man page as obsolete. - Offcore response events can be setup with rsp token. Sponsored by: NETASQ
* If there is multiple PMCs for the same interrupt ignore new post.fabient2010-03-311-3/+5
| | | | | | | This will indirectly fix a bug where the thread will be pinned forever if the assert is not compiled. MFC after: 3days
* Handling SIGPIPE will cause deadlock/crash.fabient2010-03-261-4/+0
| | | | | | Return an error immediatly in case of hard shutdown. MFC after: 3days
* Change the way shutdown is handled for log file.fabient2010-03-081-21/+27
| | | | | | | | | | | | pmc_flush_logfile is now non-blocking and just ask the kernel to shutdown the file. From that point, no more data is accepted by the log thread and when the last buffer is flushed the file is closed. This will remove a deadlock between pmcstat asking for flush while it cannot flush the pipe itself. MFC after: 3 days
* Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.gnn2010-03-034-2/+811
| | | | | | | | Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
* Use VFS_{LOCK,UNLOCK}_GIANT() around the call to vrele().jkoshy2009-12-291-0/+6
| | | | Reviewed by: kib
* * Support the L1D_CACHE_LD event on Core2 processors.jkoshy2009-12-261-8/+8
| | | | | | | | * Correct a group of typos: for Core2 programmable events, check user supplied umask values against the correct event descriptor field. Submitted by: Ryan Stone <rysto32 at gmail dot com>
* Log process mappings for existing processes at PMC start time.jkoshy2009-12-261-3/+161
| | | | | Submitted by: Marc Unangst <mju at panasas dot com> [original patch] Tested by: fabient
* Intel XScale hwpmc(4) support.rpaulo2009-12-234-20/+803
| | | | | | | | | | | This brings hwpmc(4) support for 2nd and 3rd generation XScale cores. Right now it's enabled by default to make sure we test this a bit. When the time comes it can be disabled by default. Tested on Gateworks boards. A man page is coming. Obtained from: //depot/user/rpaulo/xscalepmc/...
* Recognize Intel CPUs with Family 0x6, Models 0x1E and 0x1F.jkoshy2009-12-181-0/+2
| | | | Submitted by: Marc Unangst <mju at panasas dot com>
* Use a better check for a valid kernel stack address when capturingjkoshy2009-12-031-2/+3
| | | | | | | kernel call chains. Submitted by: Mark Unangst <mju at panasas.com> Tested by: fabient
* Fix parenthesis typo -- copy full frame pointer for userland callchain,emaste2009-12-011-1/+1
| | | | | | not just one byte. Submitted by: Ryan Stone rysto32 at gmail dot com
* Use switch out (SWO) instead of switch in (SWI) debug log mask in csw_out.emaste2009-11-301-1/+1
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* - fix a LOR between process lock and pmc thread mutexfabient2009-11-241-14/+19
| | | | | | | | - fix a system deadlock on process exit when the sample buffer is full (pmclog_loop blocked in fo_write) and pmcstat exit. Reviewed by: jkoshy MFC after: 3 weeks
* Only claim that the PMC_CLASS_IAF PMCs are supported by a CPU ifjkoshy2009-10-241-5/+15
| | | | | | there are PMCs on the CPU that belong to the class. Review and testing by: fabient
* Handle the case where there is only one PMC in the system.fabient2009-10-211-4/+4
| | | | | Approved by: jkoshy (mentor) MFC after: 3 days
* Fix KASSERT string to include the real module name.rpaulo2009-10-181-1/+1
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* Reserve events for XScale.rpaulo2009-09-221-2/+29
| | | | | Reviewed by: jkoshy, gnn MFC after: 1 week
* Add counters for the i7 architecture which were accidentally leftgnn2009-09-012-3/+82
| | | | | | | | | | out of the original commit of i7 support. These are all the counters on pages A-32 and A-33 of the _Intel(R) 64 and IA32 Architectures Software Developer's Manual Vol 3B_, June 2009. Almost all of these counters relate to operations on the L2 cache. Reviewed by: jkoshy MFC after: 1 month
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-144-20/+19
| | | | | | | | | | | | | | | | - Provide lapic_disable_pmc(), lapic_enable_pmc(), and lapic_reenable_pmc() routines in the local APIC code that the hwpmc(4) driver can use to manage the local APIC PMC interrupt vector. - Do not enable the local APIC PMC interrupt vector by default when HWPMC_HOOKS is enabled. Instead, the hwpmc(4) driver explicitly enables the interrupt when it is succesfully initialized and disables the interrupt when it is unloaded. This avoids enabling the interrupt on unsupported CPUs which may result in spurious NMIs. Reported by: rnoland Reviewed by: jkoshy Approved by: re (kib) MFC after: 2 weeks
* Fix a LOR between pmc_sx and proctree/allproc when creating a new threadattilio2009-06-252-7/+19
| | | | | | | | for the pmclog. Reported by: Ryan Stone <rstone at sandvine dot com> Tested by: Ryan Stone <rstone at sandvine dot com> Sponsored by: Sandvine Incorporated
* - Add support for nehalem/corei7 cpus. This supports all of the corejeff2009-01-273-53/+838
| | | | | | | | counters defined in the reference manual. It does not support the 'uncore' events. Reviewed by: jkoshy Sponsored by: Nokia
* Bug fixes:jkoshy2008-12-161-7/+6
| | | | | | | | | | - Initialize variables before use. - Remove a KASSERT() that could falsely trigger if there are other sources of NMIs in the system. Efficiency tweak: - When checking PMCs that overflowed, ignore PMCs that were not configured for sampling.
* - Disambiguate a few panic messages.jkoshy2008-12-151-35/+37
| | | | - Style fixes: wrap long lines, parenthesize return values.
* - Bug fix: prevent a thread from migrating between CPUs between thejkoshy2008-12-131-16/+60
| | | | | | | | | | | | | time it is marked for user space callchain capture in the NMI handler and the time the callchain capture callback runs. - Improve code and control flow clarity by invoking hwpmc(4)'s user space callchain capture callback directly from low-level code. Reviewed by: jhb (kern/subr_trap.c) Testing (various patch revisions): gnn, Fabien Thomas <fabien dot thomas at netasq dot com>, Artem Belevich <artemb at gmail dot com>
* Fixes for Core2 Extreme support.jkoshy2008-12-032-3/+5
| | | | Submitted by: "Artem Belevich" <artemb at gmail dot com>
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