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* Update hwpmc to support Haswell class processors.sbruno2013-03-284-187/+532
| | | | | | | | | | | | 0x3C: /* Per Intel document 325462-045US 01/2013. */ Add manpage to document all the goodness that is available in this processor model. Submitted by: hiren panchasara <hiren.panchasara@gmail.com> Reviewed by: jimharris, sbruno Obtained from: Yahoo! Inc. MFC after: 2 weeks
* MFCattilio2013-03-081-6/+15
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| * Add a generic way to call per event allocate / release function.fabient2013-03-051-6/+15
| | | | | | | | | | Reviewed by: mav MFC after: 1 month
| * Add support for good old 8192Hz profiling clock to software PMC.mav2013-02-261-3/+6
| | | | | | | | Reviewed by: fabient
| * Change the way how software PMC updates counters.mav2013-02-261-2/+6
| | | | | | | | | | | | This at least fixes -n option of pmcstat. Reviewed by: fabient
* | MFCattilio2013-02-261-3/+6
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* | MFCattilio2013-02-261-2/+6
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* | Rename VM_OBJECT_LOCK(), VM_OBJECT_UNLOCK() and VM_OBJECT_TRYLOCK() toattilio2013-02-201-10/+10
| | | | | | | | | | | | their "write" versions. Sponsored by: EMC / Isilon storage division
* | Switch vm_object lock to be a rwlock.attilio2013-02-201-0/+1
|/ | | | | | | | * VM_OBJECT_LOCK and VM_OBJECT_UNLOCK are mapped to write operations * VM_OBJECT_SLEEP() is introduced as a general purpose primitve to get a sleep operation using a VM_OBJECT_LOCK() as protection * The approach must bear with vm_pager.h namespace pollution so many files require including directly rwlock.h
* Update hwpmc to support the Xeon class of Ivybridge processors.sbruno2013-01-313-191/+428
| | | | | | | | | | | | | | case 0x3E: /* Per Intel document 325462-045US 01/2013. */ Add manpage to document all the goodness that is available in this processor model. No support for uncore events at this time. Submitted by: hiren panchasara <hiren.panchasara@gmail.com> Reviewed by: davide, jimharris, sbruno Obtained from: Yahoo! Inc. MFC after: 2 weeks
* Quiesce a couple of clang warningssbruno2013-01-122-2/+2
| | | | | Submitted by: hiren panchasara <hiren.panchasara@gmail.com> Obtained from: Yahoo! Inc
* Fixup r240246: hwpmc needs to retain the pinning until ASTs are notattilio2012-10-301-1/+1
| | | | | | | | | | | | | executed. This means past the point where userret() is generally executed. Skip the td_pinned check if a callchain tracing is currently happening and add a more robust check to pmc_capture_user_callchain() in order to catch td_pinned leak past ast() in hwpmc case. Reported and tested by: fabient MFC after: 1 week X-MFC: r240246
* Cleanup and rename some variables in libpmc and hwpmc.sbruno2012-10-241-5/+5
| | | | | | | Submitted by: hiren panchasara <hiren.panchasara@gmail.com> Reviewed by: jimharris@ sbruno@ Obtained from: Yahoo! Inc. MFC after: 2 weeks
* Remove the support for using non-mpsafe filesystem modules.kib2012-10-221-3/+0
| | | | | | | | | | | | In particular, do not lock Giant conditionally when calling into the filesystem module, remove the VFS_LOCK_GIANT() and related macros. Stop handling buffers belonging to non-mpsafe filesystems. The VFS_VERSION is bumped to indicate the interface change which does not result in the interface signatures changes. Conducted and reviewed by: attilio Tested by: pho
* Update hwpmc to support the Xeon class of Sandybridge processors.sbruno2012-10-193-211/+532
| | | | | | | | | | | | | | (Model 0x2D /* Per Intel document 253669-044US 08/2012. */) Add manpage to document all the goodness that is available in this processor model. No support for uncore events at this time. Submitted by: hiren panchasara <hiren.panchasara@gmail.com> Reviewed by: jimharris@ fabient@ Obtained from: Yahoo! Inc. MFC after: 2 weeks
* hwpmc amd_pcpu_fini: fix a bug in code locked under DEBUGavg2012-09-181-1/+1
| | | | MFC after: 16 days
* Remove all the checks on curthread != NULL with the exception of some MDattilio2012-09-132-9/+3
| | | | | | | | | | | trap checks (eg. printtrap()). Generally this check is not needed anymore, as there is not a legitimate case where curthread != NULL, after pcpu 0 area has been properly initialized. Reviewed by: bde, jhb MFC after: 1 week
* Complete and merge the list between Sandy/Ivy bridge of eventsfabient2012-09-071-28/+18
| | | | | | that can run on specific PMC. MFC after: 1 month
* Add Intel Ivy Bridge support to hwpmc(9).fabient2012-09-064-176/+433
| | | | | | | | | | Update offcore RSP token for Sandy Bridge. Note: No uncore support. Will works on Family 6 Model 3a. MFC after: 1 month Tested by: bapt, grehan
* Disable hwpmc(4) support for Intel Xeon Sandy Bridge (Model 0x2D).davide2012-06-171-1/+0
| | | | | | | | | Due to some differences in MSRs between Xeon Sandy Bridge and Core Sandy Bridge (Model 0x2A), wrmsr() may generate in a GP# fault exception and so a panic of the machine. Approved by: gnn (mentor) MFC after: 3 days
* Add ARM callchain support for hwpmc.fabient2012-06-131-12/+92
| | | | | Sponsored by: NETASQ MFC after: 3 days
* Soft PMC support for ARM.fabient2012-05-231-8/+17
| | | | | | Callgraph is not captured, only current location. Sample system wide profiling: "pmcstat -Sclock.hard -T"
* Remove out of date KASSERT that fire with soft PMC.fabient2012-05-101-12/+0
| | | | MFC after: 1 week
* Fix so that ,usr and ,os work correctly with fixed function (IAF)gnn2012-05-021-1/+2
| | | | | | counters. MFC after: 1 week
* Fix class malloc init for mips and powerpc that was not convertedfabient2012-04-232-6/+2
| | | | | | | by r233628. Found by: monthadar, adrian MFC after: 1 week
* Add software PMC support.fabient2012-03-2815-69/+802
| | | | | | | | | | | | | New kernel events can be added at various location for sampling or counting. This will for example allow easy system profiling whatever the processor is with known tools like pmcstat(8). Simultaneous usage of software PMC and hardware PMC is possible, for example looking at the lock acquire failure, page fault while sampling on instructions. Sponsored by: NETASQ MFC after: 1 month
* Fix crash on VirtualBox (and probably on some real hardware):gonzo2012-03-272-1/+8
| | | | | | | | - Do not cover error returned by pmc_core_initialize with the result of pmc_uncore_initialize, fail right away. - Give a user something to report instead failing silently Reported by: Alexandr Kovalenko <never@nevermind.kiev.ua>
* Fix random deadlock on pmcstat exit:fabient2012-03-271-2/+4
| | | | | | | | | | - Exit the thread when soft shutdown is requested - Wakeup owner thread. Reproduced/tested by looping pmcstat measurement: pmcstat -S instructions -O/tmp/test ls MFC after: 1 week
* Add Octeon PMC hardware backendgonzo2012-03-231-0/+195
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* Add list of Octeon's PMC counters obtained from cvmx-core.hgonzo2012-03-231-0/+63
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* Rework MIPS PMC code:gonzo2012-03-223-598/+561
| | | | | | | | - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
* - Remove unncessary type castsgonzo2012-03-141-6/+15
| | | | | | - Make kernel backtrace routine more robust by refusing to backtrace further when encountered function that is possibly modifies SP value
* This header file no longer exists when doing cross builds, so remove it.adrian2012-03-121-1/+0
| | | | mips24k hwpmc now compiles again.
* Implement pmc_save_user_callchain and pmc_save_kernel_callchain for MIPSgonzo2012-03-121-10/+308
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* Properly mask off bits that are not supported in the IAP counters.gnn2012-03-061-1/+1
| | | | | | | This fixes a bug where users would see massively large counts, near to 2**64 -1, due to the bits not being cleared. MFC after: 3 weeks
* - Add support for the Intel Sandy Bridge microarchitecture (both core and ↵davide2012-03-015-177/+742
| | | | | | | | | | | uncore counting events) - New manpages with event lists. - Add MSRs for the Intel Sandy Bridge microarchitecture Reviewed by: attilio, brueffer, fabient Approved by: gnn (mentor) MFC after: 3 weeks
* pmc_*_initialize may return NULL if the CPU is not supported, so checkemaste2012-01-281-1/+1
| | | | | | that md is not null before dereferencing it. PR: kern/156540
* Clean up a switch statement for uncore events on Westmere processors.gnn2012-01-132-12/+3
| | | | | | Submitted by: Davide Italiano Reviewed by: gnn MFC after: 1 week
* Update PMC events from October 2011 Intel documentation.fabient2012-01-042-12/+11
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days
* Add missing MSR programming for some events.fabient2012-01-043-6/+61
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days
* In sys/dev/hwpmc/hwpmc_amd.c, fix a clang warning about invalid enumdim2011-12-311-3/+1
| | | | | | | conversions. Reviewed by: jkoshy MFC after: 1 week
* Quite the tinderbox for the holidays. Remove the assert[1].bz2011-12-251-5/+0
| | | | | Suggested by: jhibbits [1] MFC after: 3 days
* Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).jhibbits2011-12-242-10/+1029
| | | | | | | Sampling is in progress. Approved by: nwhitehorn (mentor) MFC after: 9.0-RELEASE
* - Remove extra spaceeadler2011-12-211-1/+1
| | | | | Submitted by: Davide Italiano <davide.italiano@gmail.com> Approved by: brucec
* There's a small set of events on Nehalem, that are not supported infabient2011-12-121-1/+12
| | | | | | | | | processors with CPUID signature 06_1AH, 06_1EH, and 06_1FH. Refuse to allocate them on unsupported model. Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 1 month
* Update Westmere uncore event exception list.fabient2011-12-021-0/+8
| | | | | Submitted by: Davide Italiano <davide italiano at gmail com> MFC after: 1 week
* Flip on processing interrupt profile events for mips24k.adrian2011-11-091-1/+61
| | | | | | | | | | | This is a bit hackish and should be made more generic (ie, support more than two hard-coded performance counter+config register pairs) so it can be used for mips74k and other chips. All this does is process the initial interrupt event. It doesn't (yet) handle callgraph events, so even if you route the exception/interrupt to this routine and flip the bit on, it will hang and crash pmc unless you disable callgraph support when you enable a sample based PMC.
* Add a flush of the current PMC log buffer before displaying the next top.fabient2011-10-182-18/+61
| | | | | | | | As the underlying block is 4KB if the PMC throughput is low the measurement will be reported on the next tick. pmcstat(8) use the modified flush API to reclaim current buffer before displaying next top. MFC after: 1 month
* Begin implementing correct MIPS24K sampling mode behaviour.adrian2011-10-071-4/+7
| | | | | | | | * Add the interrupt bit in the configuration register * Correctly set the counter register for the sampling overflow interrupt. The interrupt is asserted when bit 31 is set. So set the overflow value at 0x80000000 and subtract the programmed value as appropriate.
* In order to maximize the re-usability of kernel code in user space thiskmacy2011-09-162-3/+3
| | | | | | | | | | | | | patch modifies makesyscalls.sh to prefix all of the non-compatibility calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel entry points and all places in the code that use them. It also fixes an additional name space collision between the kernel function psignal and the libc function of the same name by renaming the kernel psignal kern_psignal(). By introducing this change now we will ease future MFCs that change syscalls. Reviewed by: rwatson Approved by: re (bz)
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