summaryrefslogtreecommitdiffstats
path: root/sys/dev/hwpmc
Commit message (Collapse)AuthorAgeFilesLines
* Fix two aliases that had the same name but were pointing to differentgnn2010-10-041-2/+2
| | | | | | events. These are now disamiguated. MFC after: 1 week
* Fix invalid class removal when IAF is not the last class.fabient2010-09-051-15/+2
| | | | | | Keep IAF class with 0 PMC and change the alias in libpmc to IAP. MFC after: 1 week
* Make sure that we clear the correct bits when we turn offgnn2010-07-292-21/+34
| | | | | | | | | | | a PMC. It was possible that we could have turned a bit on but never cleared it. Extend the calls to rdmsr() to all necessary functions, not just those which previously caused a panic. Pointed out by: jhb@ MFC after: 1 week
* Fix a panic brought about by writing an MSR without a proper mask.gnn2010-07-132-13/+86
| | | | | | | | | All of the necessary wrmsr calls are now preceded by a rdmsr and we leave the reserved bits alone. Document the bits in the relevant registers for future reference. Tested by: mdf MFC after: 1 week
* Convert pm_runcount to int to correctly check for negative value.fabient2010-06-051-8/+5
| | | | | | | Remove uncessary check for error. Found with: Coverity Prevent(tm) MFC after: 1 month
* When configuring a system-wide couting PMC, hwpmc was incorrectly logging ↵rstone2010-05-011-9/+9
| | | | | | | | | process mappings for that PMC. Nothing ever reads pmc logs out of a counting PMC, so the log buffers were leaked when the PMC was deconfigured. The process mappings are only useful for sampling PMCs anyway, so only log the mappings if the PMC is a sampling PMC. This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs. Approved by: jkoshy (mentor) MFC after: 2 weeks
* - Fix a typo OFFCORE_REQUESTS.ANY.RFO is B0H10H and not 80H10H.fabient2010-04-152-2/+3
| | | | | | - Enable missing PARTIAL_ADDRESS_ALIAS for Core i7. MFC after: 3 days
* - Support for uncore counting events: one fixed PMC with the uncorefabient2010-04-026-977/+3467
| | | | | | | | | | | | domain clock, 8 programmable PMC. - Westmere based CPU (Xeon 5600, Corei7 980X) support. - New man pages with events list for core and uncore. - Updated Corei7 events with Intel 253669-033US December 2009 doc. There is some removed events in the documentation, they have been kept in the code but documented in the man page as obsolete. - Offcore response events can be setup with rsp token. Sponsored by: NETASQ
* If there is multiple PMCs for the same interrupt ignore new post.fabient2010-03-311-3/+5
| | | | | | | This will indirectly fix a bug where the thread will be pinned forever if the assert is not compiled. MFC after: 3days
* Handling SIGPIPE will cause deadlock/crash.fabient2010-03-261-4/+0
| | | | | | Return an error immediatly in case of hard shutdown. MFC after: 3days
* Change the way shutdown is handled for log file.fabient2010-03-081-21/+27
| | | | | | | | | | | | pmc_flush_logfile is now non-blocking and just ask the kernel to shutdown the file. From that point, no more data is accepted by the log thread and when the last buffer is flushed the file is closed. This will remove a deadlock between pmcstat asking for flush while it cannot flush the pipe itself. MFC after: 3 days
* Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.gnn2010-03-034-2/+811
| | | | | | | | Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
* Use VFS_{LOCK,UNLOCK}_GIANT() around the call to vrele().jkoshy2009-12-291-0/+6
| | | | Reviewed by: kib
* * Support the L1D_CACHE_LD event on Core2 processors.jkoshy2009-12-261-8/+8
| | | | | | | | * Correct a group of typos: for Core2 programmable events, check user supplied umask values against the correct event descriptor field. Submitted by: Ryan Stone <rysto32 at gmail dot com>
* Log process mappings for existing processes at PMC start time.jkoshy2009-12-261-3/+161
| | | | | Submitted by: Marc Unangst <mju at panasas dot com> [original patch] Tested by: fabient
* Intel XScale hwpmc(4) support.rpaulo2009-12-234-20/+803
| | | | | | | | | | | This brings hwpmc(4) support for 2nd and 3rd generation XScale cores. Right now it's enabled by default to make sure we test this a bit. When the time comes it can be disabled by default. Tested on Gateworks boards. A man page is coming. Obtained from: //depot/user/rpaulo/xscalepmc/...
* Recognize Intel CPUs with Family 0x6, Models 0x1E and 0x1F.jkoshy2009-12-181-0/+2
| | | | Submitted by: Marc Unangst <mju at panasas dot com>
* Use a better check for a valid kernel stack address when capturingjkoshy2009-12-031-2/+3
| | | | | | | kernel call chains. Submitted by: Mark Unangst <mju at panasas.com> Tested by: fabient
* Fix parenthesis typo -- copy full frame pointer for userland callchain,emaste2009-12-011-1/+1
| | | | | | not just one byte. Submitted by: Ryan Stone rysto32 at gmail dot com
* Use switch out (SWO) instead of switch in (SWI) debug log mask in csw_out.emaste2009-11-301-1/+1
|
* - fix a LOR between process lock and pmc thread mutexfabient2009-11-241-14/+19
| | | | | | | | - fix a system deadlock on process exit when the sample buffer is full (pmclog_loop blocked in fo_write) and pmcstat exit. Reviewed by: jkoshy MFC after: 3 weeks
* Only claim that the PMC_CLASS_IAF PMCs are supported by a CPU ifjkoshy2009-10-241-5/+15
| | | | | | there are PMCs on the CPU that belong to the class. Review and testing by: fabient
* Handle the case where there is only one PMC in the system.fabient2009-10-211-4/+4
| | | | | Approved by: jkoshy (mentor) MFC after: 3 days
* Fix KASSERT string to include the real module name.rpaulo2009-10-181-1/+1
|
* Reserve events for XScale.rpaulo2009-09-221-2/+29
| | | | | Reviewed by: jkoshy, gnn MFC after: 1 week
* Add counters for the i7 architecture which were accidentally leftgnn2009-09-012-3/+82
| | | | | | | | | | out of the original commit of i7 support. These are all the counters on pages A-32 and A-33 of the _Intel(R) 64 and IA32 Architectures Software Developer's Manual Vol 3B_, June 2009. Almost all of these counters relate to operations on the L2 cache. Reviewed by: jkoshy MFC after: 1 month
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-144-20/+19
| | | | | | | | | | | | | | | | - Provide lapic_disable_pmc(), lapic_enable_pmc(), and lapic_reenable_pmc() routines in the local APIC code that the hwpmc(4) driver can use to manage the local APIC PMC interrupt vector. - Do not enable the local APIC PMC interrupt vector by default when HWPMC_HOOKS is enabled. Instead, the hwpmc(4) driver explicitly enables the interrupt when it is succesfully initialized and disables the interrupt when it is unloaded. This avoids enabling the interrupt on unsupported CPUs which may result in spurious NMIs. Reported by: rnoland Reviewed by: jkoshy Approved by: re (kib) MFC after: 2 weeks
* Fix a LOR between pmc_sx and proctree/allproc when creating a new threadattilio2009-06-252-7/+19
| | | | | | | | for the pmclog. Reported by: Ryan Stone <rstone at sandvine dot com> Tested by: Ryan Stone <rstone at sandvine dot com> Sponsored by: Sandvine Incorporated
* - Add support for nehalem/corei7 cpus. This supports all of the corejeff2009-01-273-53/+838
| | | | | | | | counters defined in the reference manual. It does not support the 'uncore' events. Reviewed by: jkoshy Sponsored by: Nokia
* Bug fixes:jkoshy2008-12-161-7/+6
| | | | | | | | | | - Initialize variables before use. - Remove a KASSERT() that could falsely trigger if there are other sources of NMIs in the system. Efficiency tweak: - When checking PMCs that overflowed, ignore PMCs that were not configured for sampling.
* - Disambiguate a few panic messages.jkoshy2008-12-151-35/+37
| | | | - Style fixes: wrap long lines, parenthesize return values.
* - Bug fix: prevent a thread from migrating between CPUs between thejkoshy2008-12-131-16/+60
| | | | | | | | | | | | | time it is marked for user space callchain capture in the NMI handler and the time the callchain capture callback runs. - Improve code and control flow clarity by invoking hwpmc(4)'s user space callchain capture callback directly from low-level code. Reviewed by: jhb (kern/subr_trap.c) Testing (various patch revisions): gnn, Fabien Thomas <fabien dot thomas at netasq dot com>, Artem Belevich <artemb at gmail dot com>
* Fixes for Core2 Extreme support.jkoshy2008-12-032-3/+5
| | | | Submitted by: "Artem Belevich" <artemb at gmail dot com>
* Add aliases that map architectural event names to fixed function counters.jkoshy2008-12-031-0/+5
|
* - Efficiency tweak: when checking for PMC overflows, only go tojkoshy2008-12-022-14/+13
| | | | | | | hardware for PMCs that have been configured for sampling. - Bug fix: acknowledge PMC hardware overflows irrespective of the the (software) PMC's state.
* Improve a comment.jkoshy2008-11-301-4/+7
|
* - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solojkoshy2008-11-276-20/+2878
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and model 0x1C (Atom). In these CPUs, the actual numbers, kinds and widths of PMCs present need to queried at run time. Support for specific "architectural" events also needs to be queried at run time. Model 0xE CPUs support programmable PMCs, subsequent CPUs additionally support "fixed-function" counters. - Use event names that are close to vendor documentation, taking in account that: - events with identical semantics on two or more CPUs in this family can have differing names in vendor documentation, - identical vendor event names may map to differing events across CPUs, - each type of CPU supports a different subset of measurable events. Fixed-function and programmable counters both use the same vendor names for events. The use of a class name prefix ("iaf-" or "iap-" respectively) permits these to be distinguished. - In libpmc, refactor pmc_name_of_event() into a public interface and an internal helper function, for use by log handling code. - Minor code tweaks: staticize a global, freshen a few comments. Tested by: gnn
* Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").jkim2008-11-264-7/+11
| | | | Reviewed by: jhb, peter (early amd64 version)
* Unbreak LINT.jkoshy2008-11-224-0/+24
|
* Print PMC widths in the initialization announcement.jkoshy2008-11-161-1/+2
|
* Correct an oversight: call the MD finalize hook at module unloadjkoshy2008-11-151-0/+3
| | | | time.
* Fix assertions.jkoshy2008-11-151-6/+9
| | | | Reported by: keramida
* Correct an indexing error (a change missed out in #184802).jkoshy2008-11-151-1/+1
|
* - Separate PMC class dependent code from other kinds of machinejkoshy2008-11-0913-912/+1455
| | | | | | | | | | | | | | | | | dependencies. A 'struct pmc_classdep' structure describes operations on PMCs; 'struct pmc_mdep' contains one or more 'struct pmc_classdep' structures depending on the CPU in question. Inside PMC class dependent code, row indices are relative to the PMCs supported by the PMC class; MI code in "hwpmc_mod.c" translates global row indices before invoking class dependent operations. - Augment the OP_GETCPUINFO request with the number of PMCs present in a PMC class. - Move code common to Intel CPUs to file "hwpmc_intel.c". - Move TSC handling to file "hwpmc_tsc.c".
* Style tweak.jkoshy2008-11-091-2/+2
|
* Remove unnecessary locking around vn_fullpath(). The vnode lock for thejhb2008-11-041-2/+0
| | | | | | | | | | | | | | | | vnode in question does not need to be held. All the data structures used during the name lookup are protected by the global name cache lock. Instead, the caller merely needs to ensure a reference is held on the vnode (such as vhold()) to keep it from being freed. In the case of procfs' <pid>/file entry, grab the process lock while we gain a new reference (via vhold()) on p_textvp to fully close races with execve(2). For the kern.proc.vmmap sysctl handler, use a shared vnode lock around the call to VOP_GETATTR() rather than an exclusive lock. MFC after: 1 month
* Fix a number of style issues in the MALLOC / FREE commit. I've tried todes2008-10-232-15/+13
| | | | | be careful not to fix anything that was already broken; the NFSv4 code is particularly bad in this respect.
* Retire the MALLOC and FREE macros. They are an abomination unto style(9).des2008-10-236-55/+50
| | | | MFC after: 3 months
* - Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order tojkoshy2008-10-091-443/+373
| | | | | | | | | | | reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
* Rework pmc-dependent flag handling.jkoshy2008-10-091-14/+22
|
OpenPOWER on IntegriCloud