summaryrefslogtreecommitdiffstats
path: root/sys/dev/hwpmc/hwpmc_core.c
Commit message (Expand)AuthorAgeFilesLines
* MFC 283121:jhb2015-10-011-1/+1
* MFC 283123:jhb2015-06-011-0/+8
* MFC 282641,282658:jhb2015-06-011-32/+32
* MFC of r277177 and r279894 with the fixes for the PMC for Haswell.rrs2015-03-241-230/+264
* MFC r272713:bz2014-10-101-1/+1
* MFC r267062:kib2014-06-181-1/+5
* MFC r263446hiren2014-05-311-37/+87
* Fix a >80 character long line, introduced in my previous commit.adrian2013-08-251-1/+2
* Update the MEM_UOP_RETIRED PMC operation for sandy bridge and sandyadrian2013-08-251-12/+14
* Add in missing events for Sandy Bridge Xeon.adrian2013-08-181-5/+11
* Suppress a GCC warning. This warning is actually bogus and newer GCCdavide2013-05-021-1/+1
* The Intel PMC architectural events have encodings which are identical todavide2013-04-301-17/+34
* Fixup Westmere hwpmc(4) support: add missing CPU flag so thatdavide2013-04-301-3/+3
* Improve/correct a comment. We now support a lot more cpu types.hiren2013-04-141-1/+1
* Cosmetic change: make a comment reference Sandy Bridge *Xeon*rstone2013-04-121-1/+1
* Trailing whitespace cleanup along with 80 column enforcemnt.sbruno2013-04-031-64/+68
* Update hwpmc to support Haswell class processors.sbruno2013-03-281-163/+204
* Update hwpmc to support the Xeon class of Ivybridge processors.sbruno2013-01-311-191/+218
* Update hwpmc to support the Xeon class of Sandybridge processors.sbruno2012-10-191-211/+305
* Complete and merge the list between Sandy/Ivy bridge of eventsfabient2012-09-071-28/+18
* Add Intel Ivy Bridge support to hwpmc(9).fabient2012-09-061-173/+223
* Fix so that ,usr and ,os work correctly with fixed function (IAF)gnn2012-05-021-1/+2
* Add software PMC support.fabient2012-03-281-3/+3
* Fix crash on VirtualBox (and probably on some real hardware):gonzo2012-03-271-1/+5
* Properly mask off bits that are not supported in the IAP counters.gnn2012-03-061-1/+1
* - Add support for the Intel Sandy Bridge microarchitecture (both core and unc...davide2012-03-011-153/+342
* Update PMC events from October 2011 Intel documentation.fabient2012-01-041-6/+5
* - Remove extra spaceeadler2011-12-211-1/+1
* There's a small set of events on Nehalem, that are not supported infabient2011-12-121-1/+12
* Update Westmere uncore event exception list.fabient2011-12-021-0/+8
* Fix invalid class removal when IAF is not the last class.fabient2010-09-051-15/+2
* Make sure that we clear the correct bits when we turn offgnn2010-07-291-21/+28
* Fix a panic brought about by writing an MSR without a proper mask.gnn2010-07-131-13/+32
* - Fix a typo OFFCORE_REQUESTS.ANY.RFO is B0H10H and not 80H10H.fabient2010-04-151-1/+2
* - Support for uncore counting events: one fixed PMC with the uncorefabient2010-04-021-408/+638
* * Support the L1D_CACHE_LD event on Core2 processors.jkoshy2009-12-261-8/+8
* Only claim that the PMC_CLASS_IAF PMCs are supported by a CPU ifjkoshy2009-10-241-5/+15
* Add counters for the i7 architecture which were accidentally leftgnn2009-09-011-0/+23
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-141-2/+5
* - Add support for nehalem/corei7 cpus. This supports all of the corejeff2009-01-271-51/+293
* Bug fixes:jkoshy2008-12-161-7/+6
* Fixes for Core2 Extreme support.jkoshy2008-12-031-3/+3
* - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solojkoshy2008-11-271-0/+1747
OpenPOWER on IntegriCloud