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* Fix a few typos for s25fl types.loos2013-08-281-2/+2
| | | | Approved by: adrian (mentor)
* Add support for two new winbond SPI flash parts.adrian2013-06-081-1/+5
| | | | | | | | | | | | | | The 8devices carambola 2 board uses the 16MB part. Here's how it looks: spibus0: <spibus bus> on spi0 mx25l0: <M25Pxx Flash Family> at cs 0 on spibus0 mx25l0: w25q128, sector 65536 bytes, 256 sectors Tested: * 8devices Carambola 2 board
* Remove duplicate const specifiers in many drivers (I hope I got all ofdim2012-11-051-1/+1
| | | | | | | | | | | | | | | | | | | | them, please let me know if not). Most of these are of the form: static const struct bzzt_type { [...list of members...] } const bzzt_devs[] = { [...list of initializers...] }; The second const is unnecessary, as arrays cannot be modified anyway, and if the elements are const, the whole thing is const automatically (e.g. it is placed in .rodata). I have verified this does not change the binary output of a full kernel build (except for build timestamps embedded in the object files). Reviewed by: yongari, marius MFC after: 1 week
* Add more SPI flash IDs.ray2012-09-251-9/+16
| | | | | | Submitted by: Luiz Otavio O Souza. Submitted by: ZRouter.org project. Approved by: adrian (menthor)
* Add a new flash part - 4MB SPI flash from Winbond.adrian2012-08-281-0/+1
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* Revert r236529, re-enabling verification of the flashed content asmarius2012-06-181-2/+0
| | | | | the underlying problem was dealt with in r237239 (in fact, disabling verification also actually only made the problem less likely to occur).
* Disable verification of the flashed content for now; for reasons unknownmarius2012-06-031-0/+2
| | | | it sometimes causes physwr to hang.
* - Loop up to 3 seconds when waiting for a device to get ready. [1]marius2012-06-031-97/+262
| | | | | | | | | | | | | | | | | | | | | | | | | - Make the device description match the driver name. - Identify the chip variant based on the JEDEC and use that information to use the proper values for page count, offset and size instead of hardcoding a AT45DB642x with 2^N byte page support disabled. - Take advantage of bioq_takefirst(). - Given that CONTINUOUS_ARRAY_READ_HF (0x0b) command isn't even mentioned in Atmel's DataFlash Application Note, as suggested by the previous comment may not work on all all devices and actually doesn't properly on at least AT45DB321D (JEDEC 0x1f2701), rewrite at45d_task() to use CONTINUOUS_ARRAY_READ (0xe8) for reading instead. This rewrite is laid out in a way allowing to easily add support for BIO_DELETE later on. - Add support for reads and writes not starting on a page boundary. - Verify the flash content after writing. - Let at45d_task() gracefully handle errors on SPI transfers and the device not becoming ready afterwards again. [1] - Use DEVMETHOD_END. [1] - Use NULL instead of 0 for pointers. [1] Additional testing by: Ian Lepore Submitted by: Ian Lepore [1] MFC after: 1 week
* Add a couple more SPI flash device IDs found in commercialadrian2012-01-041-0/+2
| | | | | | consumer wireless kit. Submitted by: Stefan Bethke <stb@lassitu.de>
* Modify the spi flash driver to allow smaller read IO sizes, but enforceadrian2011-02-161-17/+18
| | | | | | | | | | | | the larger, aligned write+erase sizes the driver currently implements. This preserves write behaviour but makes the flash driver usable for things like a read-only FFS or a geom_uzip/geom_compress . Note that since GEOM will now return the sector size as being smaller, writes of sector size/alignment will now fail with an EIO. Code which writes to the flash device will have to be (for now) manually taught about the flash write blocksize.
* Add support for the m25p64; lifted straight from Linux.adrian2011-01-301-0/+1
| | | | | This flash chip is found on the Ubiquiti LS-SR71 board. I've successfully tested reading; I've not tried writing to it yet.
* Add s25sl064a, an 8mb SPI flash part.adrian2010-08-171-0/+1
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* Fix naming to be consistent.adrian2010-07-191-2/+2
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* Extend the mx25l erase function to support different erase commands.adrian2010-07-191-3/+3
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* Extend the mx25l flash device support to include a set of per-deviceadrian2010-07-191-4/+11
| | | | | | | flags. Some of these parts will support 4K/32K block erases rather than a sector erase. This includes (at least) the MX25L128.
* Include 4k/32k erase commands.adrian2010-07-191-0/+4
| | | | | | | These were sourced from the MX25L128 datasheet and match up with what is used in Linux mtd/devices/m25p80.c . Add a FreeBSD keyword whilst I'm here.
* Fix KASSERT() messages to reflect reality.adrian2010-07-161-2/+2
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* - Code reorg: extract mx25l_read and mx25l_write methodsgonzo2009-11-181-81/+146
| | | | | - Add entry for Spansion flash controller Submitted by: Eric L. Chen <lihong@ieee.org>
* - Add write support for mx25l flash chipgonzo2009-10-252-1/+104
| | | | - Some minor style(9) fixes
* o Move the driveid.h fileimp2009-06-141-259/+0
| | | | | | | o lots of tweaks to header paths. o comment out SMP for the moment # we now make it through the .c make depend, the .s needs more work.
* Part of the cf driver missed.imp2009-06-141-0/+259
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* Move dev/flash/ cf driver into octeon dir where it belongs.imp2009-06-142-654/+0
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* Merge in Cavium's CF driver. This too is in the wrong place and willimp2009-06-142-0/+654
| | | | be moved.
* Merge from HEADgonzo2009-05-261-1/+0
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| * - Remove nonexistent header file from includes listgonzo2009-05-131-1/+0
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* | - Add support for MX25Lxxx SPI flash (readonly atm)gonzo2009-05-182-0/+369
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* Rename the kthread_xxx (e.g. kthread_create()) callsjulian2007-10-201-1/+1
| | | | | | | | | | | to kproc_xxx as they actually make whole processes. Thos makes way for us to add REAL kthread_create() and friends that actually make theads. it turns out that most of these calls actually end up being moved back to the thread version when it's added. but we need to make this cosmetic change first. I'd LOVE to do this rename in 7.0 so that we can eventually MFC the new kthread_xxx() calls.
* MFp4:imp2006-11-291-0/+284
Preliminary support for Atmel AT45D series of DataFlash on the SPI bus (ok, not really a hardware bus, but a logical connection). This works only for the 8MB version of the part due to hard coding. Both read and write are supported.
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