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* Add a description here.adrian2014-03-021-0/+3
* Set all of the ports into the same vlangroup; there's only one vlangroupadrian2014-03-021-5/+4
* Add ATU flush support.adrian2014-03-023-1/+79
* Add AR8216 era ATU management/configuration register definitions.adrian2014-03-021-6/+31
* (I think!) make the AR8327 switch correctly handle traffic.adrian2014-03-011-1/+31
* Be paranoid about bit operations here.adrian2014-03-011-1/+1
* Remove now dead code.adrian2014-03-011-10/+0
* Add missing includes and remove two unused ones.brueffer2014-02-273-2/+9
* Add LED setup support for the AR8327.adrian2014-02-261-0/+67
* Add in the SGMII configuration code. The DB120 doesn't use it, so Iadrian2014-02-261-2/+55
* Undo the DB120 hard-coded values in the AR8327 code and fetch it fromadrian2014-02-261-23/+210
* Add in port0/port6 configuration as part of the platform data code path.adrian2014-02-242-45/+59
* Link the AR8327 to the build.adrian2014-02-241-0/+3
* Add initial AR8327 support.adrian2014-02-242-0/+564
* Methodize the arswitch VLAN routines.adrian2014-02-243-18/+35
* * Ensure enough ports/phys are available for both the AR8327 and previousadrian2014-02-241-3/+16
* Extract out the port VLAN flags/setup code and throw it into two newadrian2014-02-191-43/+70
* Add methods for the VLAN port set/get routines.adrian2014-02-191-0/+6
* Turn the port init function into a HAL method and initialise it to theadrian2014-02-191-4/+14
* Teach the PHY register path about the different MDIO bus addressadrian2014-02-191-5/+17
* Add a new method to set up the individual port in question.adrian2014-02-191-0/+4
* Change arswitch_ports_init() to arswitch_port_init(), and teach it to takeadrian2014-02-191-16/+18
* Add in the AR8327 probe/attach code and switch type.adrian2014-02-192-0/+7
* Store away the chip version and revision; some AR8327 code depends uponadrian2014-02-192-0/+4
* Add in a flag to control whether the low or high data word of a register accessadrian2014-02-192-2/+14
* The MDIO control register for the AR8327 has a different address toadrian2014-02-171-0/+2
* Add mmd declaration.adrian2014-02-171-0/+2
* Implement PHY bus MMD writes for arswitch.adrian2014-02-172-0/+12
* Fix undefined behavior: (1 << 31) is not defined as 1 is an int and thiseadler2013-11-301-6/+6
* Fix the build of TP-WN1043ND kernel. Provide necessary includes and removeloos2013-10-291-2/+4
* - Provide necessary includes.glebius2013-10-291-2/+4
* - Provide necessary includes, that before came via if.h pollution.glebius2013-10-284-9/+7
* Add a big, big note to the vlan code that it needs to be taughtadrian2013-10-161-0/+6
* Add support for the AR9340 switch to the switch framework.adrian2013-10-161-12/+29
* Prepare to link in the AR934x SoC switch support.adrian2013-10-161-0/+3
* Initial commit of AR9340 switch SoC support.adrian2013-10-162-0/+238
* Add AR934x, AR8327 register definitions.adrian2013-10-151-1/+216
* Add the support for 802.1q and port based vlans for arswitch.loos2013-07-2311-70/+660
* Fix the arswitch instability problem. It turns out that theloos2013-07-234-27/+9
* Add a new flag (ETHERSWITCH_VID_VALID) to say what vlangroups are in use.loos2013-07-235-11/+33
* Bring in a basic ethernet switch driver for the IP17x series ofadrian2013-05-0811-0/+1650
* Fix the ukswitch code to work with the new vlan changes:adrian2013-05-081-9/+9
* Correctly mark the CPU port.adrian2013-05-081-0/+1
* Add the ability to change the vlan operation mode.adrian2013-05-083-1/+71
* Update arswitch to the new API.adrian2013-04-221-1/+1
* Convert over the etherswitch framework to use VLAN IDs per port, ratheradrian2013-04-222-9/+23
* Implement a very basic multi-PHY aware switch device.adrian2013-04-191-0/+570
* Disable automatic attachment of arswitch. It can't be auto-detected (like PHYsray2012-11-071-11/+0
* Don't try to cache the page setting - always set the page beforeadrian2012-10-221-4/+11
* Mask data to only 16 bits to be sure on write into switch reg.ray2012-10-151-1/+1
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