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* Do a sweep of the tree replacing calls to pci_find_extcap() with calls tojhb2011-03-231-1/+1
| | | | pci_find_cap() instead.
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-151-4/+4
| | | | | | | introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
* Make sure to clear IFF_DRV_RUNNING to reinitialize controller.yongari2010-09-211-0/+2
| | | | | While I'm here update if_oerrors counter when driver encounters watchdog timeout.
* Change copyright holder to author. We prefer using a real legaldelphij2010-07-303-3/+3
| | | | | | | entity for copyright holders. Approved by: sephe MFC after: 3 days
* Only Tx checksum offloading is supported now. Remove experimentalyongari2009-11-201-1/+1
| | | | code sneaked in r199611.
* Add __FBSDID.yongari2009-11-201-1/+3
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* Add IPv4/TCP/UDP Tx checksum offloading support. It seems theyongari2009-11-202-6/+43
| | | | | | controller also has support for IP/TCP checksum offloading for Rx path. But I failed to find to way to enable Rx MAC to compute the checksum of received frames.
* Because we know received bytes including CRC there is no reason toyongari2009-11-201-4/+2
| | | | | | call m_adj(9). The controller also seems to have a capability to strip CRC bytes but I failed to activate this feature except for loopback traffic.
* Add initial endianness support. It seems the controller supportsyongari2009-11-201-14/+14
| | | | | | both big-endian and little-endian format in descriptors for Rx path but I couldn't find equivalent feature in Tx path. So just stick to little-endian for now.
* Remove unnecessary structure packing.yongari2009-11-201-4/+4
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* Fix copy & paste error and remove extra space before colon.yongari2009-11-191-2/+2
| | | | Pointed out by: danfe
* Use capability pointer to access PCIe registers rather thanyongari2009-11-191-18/+26
| | | | | | | | | | directly access them at fixed address. Frequently the register offset could be changed if additional PCI capabilities are added to controller. One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe link capabilities register but the location of the register does not match with PCIe capability pointer + offset. I'm not sure it's shadow register of PCIe link capabilities register.
* Use bus_{read,write}_4 rather than bus_space_{read,write}_4.yongari2009-11-192-6/+2
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* style(9)yongari2009-11-191-59/+59
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* Remove extra spce at the EOL.yongari2009-11-193-12/+12
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* Add MSI support.yongari2009-11-192-10/+44
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* Destroy driver mutex in device detach.yongari2009-11-191-1/+2
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* Remove support code for FreeBSD 6.x versions.yongari2009-11-191-5/+0
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* Remove complex macros that were used to compute bits values.yongari2009-11-193-221/+198
| | | | | | | Although these macros may have its own strength, its complex definition make hard to read the code. Approved by: delphij
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/rwatson2009-06-261-2/+2
| | | | | | | | | | | | | IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks
* Don't leak DMA map if not freed.delphij2008-07-111-0/+2
| | | | Submitted by: kevlo
* Add et(4), a port of DragonFly's Agere ET1310 10/100/Gigabitdelphij2008-06-203-0/+3104
Ethernet device driver, written by sephe@ Obtained from: DragonFly Sponsored by: iXsystems MFC after: 2 weeks
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