| Commit message (Collapse) | Author | Age | Files | Lines |
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pci_delete_child() function called by the cardbus driver. The new function
uses resource_list_unreserve() to release the BARs decoded by the device
being removed.
Reviewed by: imp
Tested by: brooks
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is fully cleaned up if we fail to find the CIS in the devices ROM.
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stored in a BAR since the CIS BAR is mapped before the PCI bus driver
enumerates all the BARs. Without this change, the PCI bus driver would
attempt to initialize a BAR that was already allocated resulting in a panic.
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handling for the PCIR_BIOS decoding enable bit from the cardbus driver.
The PCIR_BIOS BAR does include type bits like other BARs. Instead, it is
always a 32-bit non-prefetchable memory BAR where the low bit is used as a
flag to enable decoding.
Reviewed by: imp
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offset for memory when mapping in the CIS.
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turn deactivate the resources. While this likely doesn't matter, it
is likely to be safer.
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just one last change before bed...
Pointy had to: imp
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the PORTEN and MEMEN bits in the command register than to zero the
bars.
Use pci_write_ivar directly instead of a one-line wrapper that adds no
value.
Track verbosity changes in pci.
Remove a stray blank line.
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Found with: Coverity Prevent(tm)
CID: 4138
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style of having register offsets start with PCIR_* rather than PCI_*).
Submitted by: rss
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now read config registers of cardbus cards that are inserted, but
aren't attached to a driver.
Also, add a power related comment...
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the software. This is a trivial amount of code to keep wireless
monitoring software working... I plan on removing it in 9.0.
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read before we configure the card, so we can implement
/dev/cardbus*.cis. Also, do this on a per-child basis, so we now have
a different name than before. I think i'll have to fix that for some
legacy tools to keep working.
I can now do a dumpcis on my running atheros card and have it still work!
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redundant malloc/free. Add comments about how this should really be
done. Fix an overly verbose comment about under 1MB mapping: go ahead
and set the bits, but we ignore them.
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in code from my p4 tree, not -current. Delete it here.
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allocating resources to read the CIS. I'm not sure when this changed,
but it is totally wrong. Also, add a minor improvement to the
debugging.
This should help everybody trying to run dumpcis on atheros wireless
card as well.
MFC after: 2 days
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right... Good thing the size was ignored...
Where this macro is used, there's no reason to do it anyway. There
seems to have been some old-time confusion between the CIS pointer
definition, and the BAR definitions at the base of this bug.
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support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.
Suggested by: jhb
Reviewed by: grehan, jhb, marcel
Approved by: re (kensmith), jhb (PCI maintainer hat)
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uninitialized. It gets passed into other routines that initialize
it... Cope by initializing.
Submitted by: mjacob
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in cardbus cards: update the saved copy of the PCIR_INTLINE register in
the PCI ivars in addition to the actual register.
Reviewed by: imp
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because on at least my dc based cards there's garbage in there. The
recent changes in the resource code appears to have unmasked this
problem... At least dc now probes/attaches better than it did before.
Also, we no longer need to write to the cfg for the other registers.
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Add PCI_MAX_BAR_0
minor style nit.
Add PCIM_CIS_CONFIG_MASK
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Obtained from: Hans Petter Selasky
P4: http://perforce.freebsd.org/chv.cgi?CH=112957
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was ignored, rather than freaking out. In the past, it wasn't possible
to not parse the CIS, so this changes no behavior.
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share devclass pointers, a mistake I've encouraged in the past) and
move the declaration of the pci_driver kobj class from cardbus.c to
pci_private.h so that other drivers can inherit from pci_driver.
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allocating a resource that's in the card itself.
Remove more now-redundant resource_list_add, and now-redunant code
that lives in the pci layer.
# This fixes the atheros card that I have which had its CIS in one of
# the BARs. Don't know yet if this fixes the amd64 issues reported.
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(what the heck does that mean?).
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allocation here just duplicated it (badly).
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Spotted by: ru, jhb
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- Fix build.
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are some rough edges with this still, but it seems to work well enough
to commit.
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cardbus_cis.c to this file, some code was not merged and thus resource
list entries were invalid. They didn't have a resources attached to
them.
However, the problem was masked for some time later, because newer
resources list entries were added to the head of the list, and
resource_list_find() always returned the first matching resource list
entry. Usually the underlying driver allocated a valid resource and
added it to the head of the list, and invalid one wasn't used.
In rev. 1.174 of subr_bus.c the sorting of resource list entries was
reversed demasking the problem in cardbus_alloc_resources().
This commit fixes the problem returning back some code from
cardbus_cis.c, pre-1.49 revisions.
PR: kern/87114
PR: kern/90441
Hardware provided by: Vasily Olekhov <olekhov yandex.ru>
Reviewed by: imp
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Style nit.
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It became fatal after a recent "struct resource" split change.
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last in the list rather than first.
This makes the resouces print in the 4.x order rather than the 5.x order
(eg fdc0 at 0x3f0-0x3f5,0x3f7 is 4.x, but 0x3f7,0x3f0-0x3f5 is 5.x). This
also means that the pci code will once again print the resources in BAR
ascending order.
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unknown (since my sony vaio didn't :-(.
Instead, fix the problem described by 1.49 in a different way: just
add the two calls I'd hoped I'd avoid in 1.49 by doing the (wrong)
gymnastics there. While 1.49 is a good direction to go in, each step
of the way should work :-(.
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