| Commit message (Collapse) | Author | Age | Files | Lines |
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MFC after: 2 weeks
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MFC after: 2 weeks
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the ataahci(4) and atamarvell(4) drivers share it between the host and
the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.
MFC after: 2 weeks
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string) to the geom_disk config XML so that they are easily accessible from
userland.
MFC after: 1 week
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- SMBus Controller
- SATA Controller
- HD Audio Controller
- Watchdog Controller
Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.
MFC after 3 days
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- SATA controller
- Watchdog timer
- SMBus controller
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via AHCI-like memory resource at BAR(5). Use it if BIOS was so kind to
allocate memory for that BAR. This allows hot-plug support and connection
speed reporting.
MFC after: 2 weeks
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i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.
Reviewd by: mav
MFC after: 1 month
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not enough to restore device readiness in some situations.
Tested by: Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.
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make it configure device to initiate transitions if controller configured
to accept them. This makes hint.ata.X.pm_level=1 mode working.
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SControl register. This should make things consistent and help to avoid
unexpected PHY events that I've noticed in some cases on VIA controllers.
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PCI config space. Use them to implement hot-plug and link speed reporting.
Tested on ASRock PV530 board with VX900 chipset.
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(Missed part of r215428)
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MFC after: 1 week
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PR: bin/148894
Submitted by: olgeni
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I/O length on underruns, that often happens for some SCSI commands.
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resets and increase chances of getting device back again.
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MFC after: 3 days
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- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
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Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
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XLS MIPS processor).
Submitted by: Sreekanth M. S. <kanthms at netlogicmicro dot com>
Reviewed by: mav
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K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.
Reported by: many
Reviewed by: mav
MFC after: 3 weeks
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response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.
MFC after: 2 weeks
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value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
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Some devices found need about 10-12 seconds to spinup.
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entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.
Submitted by: jfv@
MFC after: 1 week
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GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
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positive legacy detection and attach failure/panic for Marvell 88SX6141
controller and potentially some others.
PR: kern/145064
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Submitted by: Mikolaj Golub on fs@
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Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.
While there, slightly improve attach errors handling.
Reported by: kib
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channel as having no devices connected. This improves hot-unplug operation
on legacy-emulating SATA controllers.
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in ATA_CAM mode if phy connect event arrive before CAM bus initialization
completed.
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also controller side cable checks. Make respective sysctl writable.
PR: kern/143462
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it. This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots. It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
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After boot this mode can be changed with atacontrol/camcontrol as usual.
It works for both legacy and ATA_CAM wrapper mode.
PR: kern/123980
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the hack here to reprogram the interrupt for K2 SATA devices.
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corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.
This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.
Observer on: Xserve G5
Reviewed by: mav
MFC after: 1 week
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interrupt.
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fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.
This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.
MFC after: 3 days
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Found with: Coverity Prevent(tm)
CID: 4634
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Found with: Coverity Prevent(tm)
CID: 4722
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Pointy hat to: me
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and reset it on resume.
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hook it up to ada(4) also. While at it, rename *ad_firmware_geom_adjust()
to *ata_disk_firmware_geom_adjust() etc now that these are no longer
limited to ad(4).
Reviewed by: mav
MFC after: 3 days
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