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* Some dmesg cosmetics:mav2011-10-243-3/+18
* Add a "kern.features.ata_cam" sysctl in the kernel when the ATA_CAM kernelrodrigc2011-10-091-0/+3
* Fix a typo in a comment.wxs2011-10-061-1/+1
* Do not force AHCI mode on NVIDIA MCP89 SATA controllers. Recent Applemav2011-08-021-3/+21
* - Use mutex to serialize index/data register pair usage, whenmav2011-07-226-13/+94
* Skip BAR(5) usage for SATA registers access on ICH8M Apples, because formav2011-06-141-1/+3
* Intel NM10 chipset's SATA controller has same PCI ID and revision as ICH7's,mav2011-06-091-7/+23
* Chipset support for the new Intel Panther Point PCH, thanksjfv2011-05-112-0/+25
* According to ATA specifications, when ATAPI master is the only device, itmav2011-04-211-11/+21
* - Fix mapping of the last two SATA ports on 6-port Intel controllers.mav2011-04-212-3/+3
* Use periodic status polling added at r214671 only in ATA_CAM mode. Legacymav2011-04-211-7/+13
* Make PATA-like soft-reset in ata(4) more strict in checking disk signature.mav2011-04-211-2/+2
* Implement automatic SCSI sense fetching for ata(4) in ATA_CAM mode.mav2011-04-122-4/+81
* Add missing bus_dmamap_sync() calls for the work DMA map.marius2011-03-061-1/+14
* Add missing bus_dmamap_sync() calls for the work DMA map.marius2011-03-061-1/+17
* - Allocate the DMA memory used for the work area as coherent as at leastmarius2011-03-061-3/+4
* Add the disk ident and a human-meaningful description (here, the disk modelnwhitehorn2011-02-261-0/+2
* Support for the new Patsburg PCH chipset:jfv2011-02-012-0/+11
* Support for the new DH89xxCC PCH chipset including:jfv2011-01-312-0/+2
* ICH7 SATA controller in legacy mode can provide access to SATA registersmav2011-01-241-14/+104
* Several chipset drivers alter parameters relevant for the DMA tag creation,marius2010-11-288-28/+33
* Do hard reset before soft reset for SATA channels. Soft reset reported to bemav2010-11-271-1/+1
* Make ATA_CAM wrapper to report SATA power management capabilities to CAM tomav2010-11-182-0/+20
* Even if we are skipping SATA hard reset - set power management bits inmav2010-11-181-1/+5
* Record that there is no devices if SATA reset found none.mav2010-11-181-0/+2
* Some VIA SATA controllers provide access to non-standard SATA registers viamav2010-11-181-4/+128
* Add IDs for VIA VX900 chipset SATA controller.mav2010-11-171-0/+3
* Add IDs for VIA VX900 chipset SATA controller.mav2010-11-171-1/+4
* Fix typos.brucec2010-11-091-4/+4
* Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residualmav2010-11-081-0/+9
* Mark command submission timeouts as timeouts. This should trigger devicemav2010-11-061-8/+13
* Add support for odd-sized PIO transfers, sometimes used by ATAPI.mav2010-11-061-6/+18
* Remove stale line, accidentally slipped into r214016.mav2010-11-021-1/+0
* Set of legacy mode SATA enchancements:mav2010-10-1811-158/+511
* Revert r132291.mav2010-09-301-2/+1
* Add missing le32toh(), same as recently done in ata-siliconimage.c.mav2010-09-241-1/+1
* Add missing byteswap, works on big endian systems now (tested on Netlogicjchandra2010-09-231-1/+1
* Fix a problem where device detection would work unreliably on Serverworksnwhitehorn2010-09-093-20/+34
* Add fix for SiI3114 and SiI3512 chips bug, which caused sending R_ERR inmav2010-09-021-0/+8
* SATA1.x SiliconImage controllers on power-on reset TFD Status register intomav2010-09-023-17/+15
* Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).mav2010-09-011-1/+1
* Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existingmav2010-08-282-16/+43
* Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers tomav2010-07-252-1/+23
* Make legacy ATA emulation detection more strict. This should fix falsemav2010-07-161-1/+2
* Improve interrupt setup errors handling.mav2010-07-161-1/+7
* Disable multi-sector PIO transfers if ATA_SET_MULTI command failed.mav2010-07-131-0/+2
* Revert and remake r209883:mav2010-07-121-9/+15
* If ata_sata_phy_reset() failed and ata_generic_reset() is not called, markmav2010-07-107-1/+24
* On attach, grab channel lock before setting up interrupt. This fixes crashmav2010-07-101-3/+5
* Make hw.ata.ata_dma_check_80pin tunable affect not only device side, butmav2010-07-1011-15/+22
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