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* - Allocate the DMA memory used for the work area as coherent as at leastmarius2011-03-061-3/+4
| | | | | | | | the ataahci(4) and atamarvell(4) drivers share it between the host and the controller. - Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags. MFC after: 2 weeks
* Several chipset drivers alter parameters relevant for the DMA tag creation,marius2010-11-281-11/+22
| | | | | | | | | | | | i.e. alignment, max_address, max_iosize and segsize (only max_address is thought to have an negative impact regarding this issue though), after calling ata_dmainit() either directly or indirectly so these values have no effect or at least no effect on the DMA tags and the defaults are used for the latter instead. So change the drivers to set these parameters up-front and ata_dmainit() to honor them. Reviewd by: mav MFC after: 1 month
* MFp4:mav2009-12-061-1/+1
| | | | | | | | | | | | | | | | | | Introduce ATA_CAM kernel option, turning ata(4) controller drivers into cam(4) interface modules. When enabled, this options deprecates all ata(4) peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers (ada, cd, ...) and interfaces to be natively used instead. As side effect of this, ata(4) mode setting code was completely rewritten to make controller API more strict and permit above change. While doing this, SATA revision was separated from PATA mode. It allows DMA-incapable SATA devices to operate and makes hw.ata.atapi_dma tunable work again. Also allow ata(4) controller drivers (except some specific or broken ones) to handle larger data transfers. Previous constraint of 64K was artificial and is not really required by PCI ATA BM specification or hardware. Submitted by: nwitehorn (powerpc part)
* MFp4:mav2009-10-311-9/+8
| | | | | | | | - Remove most of direct relations between ATA(4) peripherial and controller levels. It makes logic more transparent and is a mandatory step to wrap ATA(4) controller level into ATA-native CAM SIM. - Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger I/O transaction sizes without additional cost.
* Remove constraint, requiring request data to fulfill controller's alignmentmav2009-09-061-3/+3
| | | | | | | | | requirements. It is busdma task, to manage proper alignment by loading data to bounce buffers. PR: kern/127316 Reviewed by: current@ Tested by: Ryan Rogers
* Move non-PCI prototypes from ata-pci.h -> ata-all.h.raj2009-06-241-2/+0
| | | | | | | | This removes unnecessary PCI #includes dependency for systems with ATA controllers living at non-PCI buses. Submitted by: Piotr Ziecik Obtained from: Semihalf
* Quite mechanical ch_detach implementations for all atapci subdrivers.mav2009-02-191-1/+0
| | | | Some dmainit call fixes for previous commit.
* Restore the default maximum segment size for the bus dma tag to 64k as itjhb2008-10-211-1/+1
| | | | | is in 6.x and 7.x. The typo caused 64k transactions to be unnecessarily split up into two PRD entries.
* This is the roumored ATA modulerisation works, and it needs a little ↵sos2008-10-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | explanation. If you just config KERNEL as usual there should be no apparent changes, you'll get all chipset support code compiled in. However there is now a way to only compile in code for chipsets needed on a pr vendor basis. ATA now has the following "device" entries: atacore: ATA core functionality, always needed for any ATA setup atacard: CARDBUS support atacbus: PC98 cbus support ataisa: ISA bus support atapci: PCI bus support only generic chipset support. ataahci: AHCI support, also pulled in by some vendor modules. ataacard, ataacerlabs, ataadaptec, ataamd, ataati, atacenatek, atacypress, atacyrix, atahighpoint, ataintel, ataite, atajmicron, atamarvell, atamicron, atanational, atanetcell, atanvidia, atapromise, ataserverworks, atasiliconimage, atasis, atavia; Vendor support, ie atavia for VIA chipsets atadisk: ATA disk driver ataraid: ATA softraid driver atapicd: ATAPI cd/dvd driver atapifd: ATAPI floppy/flashdisk driver atapist: ATAPI tape driver atausb: ATA<>USB bridge atapicam: ATA<>CAM bridge This makes it possible to config a kernel with just VIA chipset support by having the following ATA lines in the kernel config file: device atacore device atapci device atavia And then you need the atadisk, atapicd etc lines in there just as usual. If you use ATA as modules loaded at boot there is few changes except the rename of the "ata" module to "atacore", things looks just as usual. However under atapci you now have a whole bunch of vendor specific drivers, that you can kldload individually depending on you needs. Drivers have the same names as used in the kernel config explained above.
* Fix the breakage that caused AHCI devices to vanish. Editor droppings :(sos2008-04-181-25/+0
| | | | Put the ATAPI device numbering back to the old ways.
* Alloc two DMA slots pr default, silly me forgot that slaves still exists.sos2008-04-171-1/+1
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* Go back to preallocating everything possible on init.sos2008-04-171-59/+139
| | | | | This avoids calling busdma in the request processing path which caused a traumatic performance degradation. Allocation has be postponed to after we know how many devices we possible can have on portmulitpliers to save some space.
* Fix problem with slave devices.sos2008-04-141-4/+4
| | | | | Fix or rather bring ENOMEM problems back to the state it was before. Temporarily disable PortMultipliers on AHCI devices.
* Fix the brokenness in the former commit, sorry for the mess.sos2008-04-111-32/+3
| | | | | | | | The problem is that the PM support is part of a much larger WIP here, but due to popular demand I decided to get some of it imported. Also I forgot the mention: HW sponsored by: Vitsch Electronics / VEHosting
* Add experimental support for SATA Port Multiplierssos2008-04-101-130/+158
| | | | | | | Support is working on the Silicon Image SiI3124/3132. Support is working on some AHCI chips but far from all. Remember this is WIP, so test reports and (constructive) suggestions are welcome!
* Implement a workaround of the datacorruption problem on serverworks HT1000 ↵sos2007-12-131-1/+1
| | | | | | | | | chipsets. The HT1000 DMA engine seems to not always like 64K transfers and sometimes barfs data all over memory leading to instant chrash and burn. Also fix 48bit adressing issues, apparently newer chips needs 16bit writes and not the usual fifo thing. HW donated by: Travis Mikalson at TerraNovaNet
* Fix KASSERT messages.kevlo2007-11-201-1/+1
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* Try to workaound silicon bugs in Promise gen2 (ie TX4) chipssos2007-11-191-0/+1
| | | | | | Initial patch by Alexander Sabourenkov who found it in Promise's own driver. Further fixes and sanity checks by yours truely.
* OK, this is not my day, fix the former fix :/sos2007-04-081-2/+1
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* Hopefully unbreak the 64bit DMA support this time.sos2007-04-081-6/+5
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* Dont zero out 64BIT flag on DMA ops.sos2007-04-081-2/+3
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* Add support for 64bit addressing to AHCI and Marvell controllers.sos2007-04-061-4/+6
| | | | | | Munged into ATA shape and Marvell specifics my yours truely. Submitted by: jhb
* Update copyright headers.sos2007-02-211-1/+1
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* add a newbus method for obtaining the bus's bus_dma_tag_t... This isjmg2006-09-031-1/+1
| | | | | | | | | | | | | required by arches like sparc64 (not yet implemented) and sun4v where there are seperate IOMMU's for each PCI bus... For all other arches, it will end up returning NULL, which makes it a no-op... Convert a few drivers (the ones we've been working w/ on sun4v) to the new convection... Eventually all drivers will need to replace the parent tag of NULL, w/ bus_get_dma_tag(dev), though dev is usually different for each driver, and will require hand inspection... Reviewed by: scottl (earlier version)
* Get rid of the advertising clause in the copyright.sos2006-01-051-3/+1
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* Dont use the BUS_DMA_ALLOCNOW flag. Instead use BUS_DMA_NOWAIT and returnsos2005-12-051-8/+10
| | | | | | ENOMEM to the upper layers if we run out of memory. This solves part of the trouble with running on >4GB memory systems.
* Normalize a significant number of kernel malloc type names:rwatson2005-10-311-1/+1
| | | | | | | | | | | | | | | | | | | - Prefer '_' to ' ', as it results in more easily parsed results in memory monitoring tools such as vmstat. - Remove punctuation that is incompatible with using memory type names as file names, such as '/' characters. - Disambiguate some collisions by adding subsystem prefixes to some memory types. - Generally prefer lower case to upper case. - If the same type is defined in multiple architecture directories, attempt to use the same name in additional cases. Not all instances were caught in this change, so more work is required to finish this conversion. Similar changes are required for UMA zone names.
* Add support for setting the SG list segment size.sos2005-10-061-5/+6
| | | | | | Use this for the SiI3112 workaround to get rid of the "oversized DMA" errors. MFC to 6.0 candidate.
* Reshape the dma code to be a bit more flexible so it can cope withsos2005-05-031-10/+18
| | | | | | | new HW that has new and different demands. Fix a few nits in former commit in this cleanup crusade. Sponsored by: pair.com
* Update on the last commit, the dma* funciton needs to be called withsos2005-05-011-2/+2
| | | | | a channel device, not an ata device, or we'll be out of luck in reset/timeout where we dont have a device.
* Take newbusification one step further, ie use the device_t more consequentlysos2005-04-301-22/+24
| | | | | | | all way through the code down the layers, instead of the mix'n'match that resulted from the conversion done earlier. Sponsored by: pair.com
* Put the BUS_DMASYNC_PREWRITE in the rigth position.sos2005-04-081-2/+2
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* This is the much rumoured ATA mkIII update that I've been working on.sos2005-03-301-56/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o ATA is now fully newbus'd and split into modules. This means that on a modern system you just load "atapci and ata" to get the base support, and then one or more of the device subdrivers "atadisk atapicd atapifd atapist ataraid". All can be loaded/unloaded anytime, but for obvious reasons you dont want to unload atadisk when you have mounted filesystems. o The device identify part of the probe has been rewritten to fix the problems with odd devices the old had, and to try to remove so of the long delays some HW could provoke. Also probing is done without the need for interrupts, making earlier probing possible. o SATA devices can be hot inserted/removed and devices will be created/ removed in /dev accordingly. NOTE: only supported on controllers that has this feature: Promise and Silicon Image for now. On other controllers the usual atacontrol detach/attach dance is still needed. o Support for "atomic" composite ATA requests used for RAID. o ATA RAID support has been rewritten and and now supports these metadata formats: "Adaptec HostRAID" "Highpoint V2 RocketRAID" "Highpoint V3 RocketRAID" "Intel MatrixRAID" "Integrated Technology Express" "LSILogic V2 MegaRAID" "LSILogic V3 MegaRAID" "Promise FastTrak" "Silicon Image Medley" "FreeBSD PseudoRAID" o Update the ioctl API to match new RAID levels etc. o Update atacontrol to know about the new RAID levels etc NOTE: you need to recompile atacontrol with the new sys/ata.h, make world will take care of that. NOTE2: that rebuild is done differently from the old system as the rebuild is now done piggybacked on read requests to the array, so atacontrol simply starts a background "dd" to rebuild the array. o The reinit code has been worked over to be much more robust. o The timeout code has been overhauled for races. o Support of new chipsets. o Lots of fixes for bugs found while doing the modulerization and reviewing the old code. Missing or changed features from current ATA: o atapi-cd no longer has support for ATAPI changers. Todays its much cheaper and alot faster to copy those CD images to disk and serve them from there. Besides they dont seem to be made anymore, maybe for that exact reason. o ATA RAID can only read metadata from all the above metadata formats, not write all of them (Promise and Highpoint V2 so far). This means that arrays can be picked up from the BIOS, but they cannot be created from FreeBSD. There is more to it than just the missing write metadata support, those formats are not unique to a given controller like Promise and Highpoint formats, instead they exist for several types, and even worse, some controllers can have different formats and its impossible to tell which one. The outcome is that we cannot reliably create the metadata of those formats and be sure the controller BIOS will understand it. However write support is needed to update/fail/rebuild the arrays properly so it sits fairly high on the TODO list. o So far atapicam is not supported with these changes. When/if this will change is up to the maintainer of atapi-cam so go there for questions. HW donated by: Webveveriet AS HW donated by: Frode Nordahl HW donated by: Yahoo! HW donated by: Sentex Patience by: Vife and my boys (and even the cats)
* Don't set the BUS_DMA_ALLOCNOW flag for the parent tag or the tags that arescottl2004-11-171-3/+3
| | | | | | used for static memory allocations. Discussed with: sos
* Reduce the amount of memory reported to busdma.sos2004-09-101-4/+4
| | | | | This made the requirements for bouncebuffers too big with PAE. Cleanup the way size defines for transfers are implemented.
* Correct the args to busdma, mostly cosmetic.sos2004-08-201-6/+5
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* Allow the use of a supplied function to set the PRD table. This issos2004-08-131-31/+15
| | | | needed for new chips that supports 64bit addressing.
* Change the order of ata_dmainit/ata_allocate in preparation ofsos2004-08-121-1/+1
| | | | supporting new chipsets where this is needed.
* Try to narrow down the race window on HW that does not have ways tosos2004-08-051-4/+2
| | | | poll for which channel actually pulled the irq line.
* Add support for the Promise command sequencer present on all modern Promisesos2004-04-131-2/+33
| | | | | | | | | | | | | | | | | controllers (PDC203** PDC206**). This also adds preliminary support for the Promise SX4/SX4000 but *only* as a "normal" Promise ATA controller (ATA RAID's are supported though but only RAID0, RAID1 and RAID0+1). This cuts off yet another 5-8% of the command overhead on promise controllers, making them the fastest we have ever had support for. Work is now continuing to add support for this in ATA RAID, to accellerate ATA RAID quite a bit on these controllers, and especially the SX4/SX4000 series as they have quite a few tricks in there.. This commit also adds a few fixes to the SATA code needed for proper support.
* Use UMA instead of plain malloc for getting ATA request storage.sos2004-01-141-0/+1
| | | | | | | This gives +10% performance on simple tests, so definitly worth it. A few percent more could be had by not using M_ZERO'd alloc's, but we then need to clear fields all over the place to be safe, and that was deemed not worth the trouble (and it makes life dangerous).
* Overhaul of the timeout/reinit framework. This should clear up mostsos2004-01-111-2/+2
| | | | | | | | | | | | of the leftovers from the old version that really doesn't work anymore. Add a reset function for host-end of the ATA channel. This is needed for the SiI3112 in order to whack it back to reality if a device locks up the SATA interface (thereby preventing that we can reset the device). The result is that ATA now recovers from the timeouts that happens with the SiI3112A and more or less all disks based on old PATA electronics with a Marvell PATA->SATA converter. This includes lots of the popular SATA dongles and the WDC Raptor disks..
* Workaround for errata on early versions of the sii3112.sos2003-11-281-3/+5
| | | | Approved by: re@
* Fix the DMA problem that most severely hit on the DS3112a SATA chipsos2003-10-211-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in connection with Marvell based SATA->PATA dongles. The problem was caused by a combination of things working together to make it hard to spot... The ATA driver has always started the ATA command, then build the SG list for DMA and then finally started the DMA engine. While this is according to specs, it poses a potential problem as some controllers apparently do not allow for unlimitted time between starting the ATA command and starting the DMA engine. At about the same time as ATAng was committed there were lots of other changes applied, some of which was locking in parts that causes the busdma load functions to take significantly longer to load the SG list. This pushed the time spent between starting the ATA command and starting the DMA engine over the hill for some controllers (especially the Silicon Image DS3112a) and caused what looked like lost interrupts. The solution is to get all the SG list work or rather all busdma related stuff done before we even try to start anything. This has the nice side effect of seperating busdma out the way it should be, so the working of the ATA machinery is not cluttered up with busdma droppings, making the code easier to read and understand.
* Give more correct params to busdma_*sos2003-10-071-8/+9
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* Cleanup the dma int/alloc/free code.sos2003-08-251-64/+48
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* Use __FBSDID().obrien2003-08-241-2/+3
| | | | Also some minor style cleanups.
* This is a major rework of the ATA driver (ATAng)sos2003-08-241-14/+23
| | | | | | | | | | | | | | | | | | | | | | Restructure the way ATA/ATAPI commands are processed, use a common ata_request structure for both. This centralises the way requests are handled so locking is much easier to handle. The driver is now layered much more cleanly to seperate the lowlevel HW access so it can be tailored to specific controllers without touching the upper layers. This is needed to support some of the newer semi-intelligent ATA controllers showing up. The top level drivers (disk, ATAPI devices) are more or less still the same with just corrections to use the new interface. Pull ATA out from under Gaint now that locking can be done in a sane way. Add support for a the National Geode SC1100. Thanks to Soekris engineering for sponsoring a Soekris 4801 to make this support. Fixed alot of small bugs in the chipset code for various chips now we are around in that corner anyways.
* Prefer new location of pci include files (which have only been in theimp2003-08-221-1/+1
| | | | | tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
* Mega busdma API commit.scottl2003-07-011-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg. Lockfunc allows a driver to provide a function for managing its locking semantics while using busdma. At the moment, this is used for the asynchronous busdma_swi and callback mechanism. Two lockfunc implementations are provided: busdma_lock_mutex() performs standard mutex operations on the mutex that is specified from lockfuncarg. dftl_lock() is a panic implementation and is defaulted to when NULL, NULL are passed to bus_dma_tag_create(). The only time that NULL, NULL should ever be used is when the driver ensures that bus_dmamap_load() will not be deferred. Drivers that do not provide their own locking can pass busdma_lock_mutex,&Giant args in order to preserve the former behaviour. sparc64 and powerpc do not provide real busdma_swi functions, so this is largely a noop on those platforms. The busdma_swi on is64 is not properly locked yet, so warnings will be emitted on this platform when busdma callback deferrals happen. If anyone gets panics or warnings from dflt_lock() being called, please let me know right away. Reviewed by: tmm, gibbs
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