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* Do not configure Altera PIO device on ARM startup.br2015-01-041-2/+0
| | | | | PIO is a device implemented in soft-core and becomes available after flashing FPGA only.
* Merge from CheriBSD:brooks2014-11-212-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | commit d0c7d235c09fc65dbdb278e7016a96f79c6a49cc Make the Altera JTAG UART device driver slightly more forgiving of the foibles of a sub-par hrdware interface by increasing the timeout for spotting JTAG polling from one to two seconds. commit 19ed45a18832560dab967c179d83b71081c3a220 Update comment. commit 8edfe803f033cc8e33229f99894c2b7496a44d5f Add a comment about a device-driver race condition that could cause the BERI pipeline to wedge awaiting JTAG in the event that both the low-level console and the tty layer decide to write to the JTAG FIFO just before JTAG is disconnected. Resolving this race is a bit tricky as it looks like there isn't a way to 'give the character back' to the tty layer when we discover the race. The easy fix is to drop the character, which we don't yet do, but perhaps should as that is a better outcome than wedging the pipeline. commit 2ea26cf579c9defcf31e413e7c9b0fbc159237fc Add a comment about an inherent race with hardware in the Altera JTAG UART's low-level console code. Submitted by: rwatson MFC after: 1 week Sponsored by: DARPA, AFRL
* Merge from CheriBSD (2e28d2a3090239b30481f35dc452ad95a5c57389)brooks2014-11-211-13/+0
| | | | | | | Remove initalized, but unused devname variable MFC after: 1 week Sponsored by: DARPA, AFRL
* Add Altera Parallel IO (PIO) device driver.br2014-11-183-0/+323
| | | | Sponsored by: DARPA, AFRL
* Mechanically convert to if_inc_counter().glebius2014-09-191-9/+9
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* Merge atse(4) interrupt handling and race condition fixes from cheribsd:bz2014-09-162-71/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 8bd88585ed8e3f7def0d780a1bc30d96fe642b9c Rework atse_rx_cycles handling: count packets instead of fills, and use the limit only when polling, not when in interrupt mode. Otherwise, we may stop reading the FIFO midpacket and clear the event mask even though the FIFO still has data to read, which could stall receive when a large packet arrives. Add a comment about races in the Altera FIFO interface: we may need to do a little more work to handle races than we are. commit 20b39086cc612f8874dc9e6ef4c0c2eb777ba92a Use 'sizeof(data)' rather than '4' when checking an mbuf bound, as is the case for adjusting length/etc. commit e18953174a265f40e9ba60d76af7d288927f5382 Break out atse_intr() into two separate routines, one for each of the two interrupt sources: receive and transmit. commit 6deedb43246ab3f9f597918361831fbab7fac4ce For the RX interrupt, take interest only in ALMOSTEMPTY and OVERFLOW. For the TX interrupt, take interest only in ALMOSTFULL and UNDERFLOW. Perform TX atse_start_locked() once rather than twice in TX interrupt handling -- and only if !FULL, rather than unconditionally. commit 12601972ba08d4380201a74f5b967bdaeb23092c Experimentation suggests that the Altera Triple-Speed Ethernet documentation is incorrect and bits in the event and interrupt-enable registers are not irrationally rearranged relative to the status register. commit 3cff2ffad769289fce3a728152e7be09405385d8 Substantially rework interrupt handling in the atse(4) driver: - Introduce a new macro ATSE_TX_PENDING() which checks whether there is any pending data to transmit, either in an in-progress packet or in the TX queue. - Introduce new ATSE_RX_STATUS_READ() and ATSE_TX_STAUTS_WRITE() macros that query the FIFO status registers rather than event registers, offering level- rather than edge-triggered FIFO conditions. - For RX, interrupt only on full/overflow/underflow; for TX, interrupt only on empty/overflow/underflow. - Add new ATSE_RX_INTR_READ() and ATSE_RX_INTR_WRITE() macros useful for debugging interrupt behaviour. - Add a debug.atse_intr_debug_enable sysctl that causes various pieces of FIFO state to be printed out on each RX or TX interrupt. This is disabled by default but good to turn on if the interface appears to wedge. Also print debugging information when polling. - In the watchdog handler, do receive, not just transmit, processing, to ensure that the rx, not just tx, queue is being handled -- and, in particular, will be drained such that interrupts can resume. - Rework both atse_rx_intr() and atse_tx_intr() to eliminate many race conditions, and add comments on why various things are in various orders. Interactions between modifications to the event and interrupt masks are quite subtle indeed, and we must actively check for a number of races (e.g., event mask cleared; packet arrives; interrupts enabled). We also now use the status registers rather than event registers for FIFO status checks to avoid other races; we continue to use event registers for underflow/overflow. With this change, interrupt-driven operation of atse appears (for the time being) robust. commit 3393bbff5c68a4e61699f9b4a62af5d2a5f918f8 atse: Fix build after 3cff2ffa Obtained from: cheribsd Submitted by: rwatson, emaste Sponsored by: DARPA/AFRL MFC after: 3 days
* Use define from if_var.h to access a field inside struct if_data,glebius2014-08-301-1/+1
| | | | | | that resides in struct ifnet. Sponsored by: Nginx, Inc.
* Use ETHER_ALIGN as argument to m_adj() to offset the beginning of packetbz2014-04-161-2/+2
| | | | | | | | | | | rather than the magic number 2. While here fix a typo in a comment. No functional changes. MFC after: 1 week Sponsored by: DARPA/AFRL
* Follow r261352 by updating all drivers which are children of simplebusian2014-02-024-0/+12
| | | | | | | | | | | | | to check the status property in their probe routines. Simplebus used to only instantiate its children whose status="okay" but that was improper behavior, fixed in r261352. Now that it doesn't check anymore and probes all its children; the children all have to do the check because really only the children know how to properly interpret their status property strings. Right now all existing drivers only understand "okay" versus something- that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
* Another round of removing historical mbuf(9) allocator flags.glebius2014-01-161-1/+1
| | | | | | They are breeding! New ones arouse since last round. Sponsored by: Nginx, Inc.
* These nexus attachments do not execute a real probe and so neednwhitehorn2013-10-294-4/+4
| | | | BUS_PROBE_NOWILDCARD set.
* Add a couple includes if net/if_var.h that were missed in r257176.brooks2013-10-282-0/+2
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* MFP4: 221483, 221567, 221568, 221670, 221677, 221678, 221800, 221801,brooks2013-10-185-0/+3037
| | | | | | | | | | | | | | 221804, 221805, 222004, 222006, 222055, 222820, 1135077, 1135118, 1136259 Add atse(4), a driver for the Altera Triple Speed Ethernet MegaCore. The current driver support gigabit Ethernet speeds only and works with the MegaCore only in the internal FIFO configuration in the soon to be open sourced BERI CPU configuration. Submitted by: bz MFC after: 3 days Sponsored by: DARPA/AFRL
* MFP4 (driver change only):brooks2013-10-181-4/+14
| | | | | | | | | | Change 231100 by brooks@brooks_zenith on 2013/07/12 21:01:31 Add a new option ALTERA_SDCARD_FAST_SIM which checks immediatly for success of I/O operations rather than queuing a task. MFC after: 3 days Sponsored by: DARPA/AFRL
* MFP4:brooks2013-10-181-6/+9
| | | | | | | | | | Change 227594 by brooks@brooks_zenith on 2013/04/11 17:10:14 When we fail, print the error that occured if we are giving up or if bootverbose is set. MFC after: 3 days Sponsored by: DARPA/AFRL
* Partial MFC of change 228122:brooks2013-04-301-1/+1
| | | | | | | Due to the requirement that tty prefixes be unique per driver, rename the Altera JTAG UART devices to ttyj#. Sponsored by: DARPA, AFRL
* MFP4 change 219820brooks2013-01-221-1/+1
| | | | | | | | Add a missing 0 to the mask for byte0 of C_SIZE. The previous mask (0xc) worked except that the last 0-1536K of the disk could not be accessed since we were shifting the (wrong) bits we did mask off the right edge.
* MFP4 change 219819brooks2013-01-221-7/+0
| | | | | | Remove a duplicate computation of C_SIZE_MULT. Once is sufficient. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219952 to head:rwatson2013-01-1312-12/+12
| | | | | | | Make different bus attachments for Altera and Terasice device drivers share the same devclass_t. Sponsored by: DARPA, AFRL
* Partially merge Perforce changeset 219942 to head:rwatson2013-01-131-31/+44
| | | | | | | | | Implement an FDT attachment for altera_avgen(4). Portions of the changeset updating DTS and device.hints will be merged separately. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219941 to head:rwatson2013-01-131-0/+143
| | | | | | | Copy altera_avgen(4) nexus attachment as a starting point for an FDT attachment. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219940 to head:rwatson2013-01-133-399/+21
| | | | | | | | Rework altera_avgen(4) to cleanly(ish) separate nexus bus attachment from the driver itself. This should allow us to plug in an fdt attachment more easily. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219939 to head:rwatson2013-01-131-0/+451
| | | | | | | | Start restructuring of altera_avgen(4) so that it can have an FDT attachment -- this requires first properly breaking out the current nexus attachment from the driver implementation. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219927 to head:rwatson2013-01-131-15/+21
| | | | | | Implement an FDT attachment for the Altera SD Card driver Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219926 to head:rwatson2013-01-131-0/+116
| | | | | | | Copy Altera SDCard nexus attachment as a starting point for the FDT attachment. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219918 to head:rwatson2013-01-131-15/+21
| | | | | | Naive first cut at an FDT bus attachment for the Altera JTAG UART. Sponsored by: DARPA, AFRL
* Merge Perforce changeset 219917 to head:rwatson2013-01-131-0/+143
| | | | | | | Copy Altera JTAG UART nexus bus attachment as a starting point for an FDT bus attachment. Sponsored by: DARPA, AFRL
* Correct double "the the"eadler2012-09-141-1/+1
| | | | | Approved by: cperciva MFC after: 3 days
* Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core,rwatson2012-08-254-0/+1132
| | | | | | | | | | | | | | | | | | | | | | which presents a UART-like interface over the Avalon bus that can be addressed over JTAG. This IP core proves extremely useful, allowing us to connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard and soft cores. As interrupts are optionally configured for this soft core, we support both interrupt-driven and polled modes of operation, which must be selected using device.hints. UART instances appear in /dev as ttyu0, ttyu1, etc. However, it also contains a number of quirks, which make it difficult to tell when JTAG is connected, and some buffering issues. We work around these as best we can, using various heuristics. While the majority of this device driver is not only not BERI-specific, but also not MIPS-specific, for now add its defines in the BERI files list, as the console-level parts are aware of where the first JTAG UART is mapped on Avalon, and contain MIPS-specific address translation, to use before Newbus and device.hints are available. Sponsored by: DARPA, AFRL
* Add a device driver for the Altera University Program SD Card IP Core,rwatson2012-08-255-0/+1397
| | | | | | | | | | | | | | | | | | | | | | which can be synthesised in Altera FPGAs. An altera_sdcardc device probes during the boot, and /dev/altera_sdcard devices come and go as inserted and removed. The device driver attaches directly to the Nexus, as is common for system-on-chip device drivers. This IP core suffers a number of significant limitations, including a lack of interrupt-driven I/O -- we must implement timer-driven polling, only CSD 0 cards (up to 2G) are supported, there are serious memory access issues that require the driver to verify writes to memory-mapped buffers, undocumented alignment requirements, and erroneous error returns. The driver must therefore work quite hard, despite a fairly simple hardware-software interface. The IP core also supports at most one outstanding I/O at a time, so is not a speed demon. However, with the above workarounds, and subject to performance problems, it works quite reliably in practice, and we can use it for read-write mounts of root file systems, etc. Sponsored by: DARPA, AFRL
* Add altera_avgen(4), a generic device driver to be used by hard and softrwatson2012-08-252-0/+534
CPU cores on Altera FPGAs. The device driver allows memory-mapped devices on Altera's Avalon SoC bus to be exported to userspace via device nodes. device.hints directories dictate device name, permissible access methods, physical address and length, and I/O alignment. Devices can be accessed using read(2)/write(2), but also memory mapped in userspace using mmap(2). Devices attach directly to the Nexus, as is common for embedded device drivers; in the future something more mature might be desirable. There is currently no facility to support directing device-originated interrupts to userspace. In the future, this device driver may be renamed to socgen(4), as it can in principle also be used with other system-on-chip (SoC) busses, such as Axi on ASICs and FPGAs. However, we have only tested it on Avalon busses with memory-mapped ROMs, frame buffers, etc. Sponsored by: DARPA, AFRL
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