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path: root/sys/dev/acpica/acpi_pcib_acpi.c
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* Add a new method to the PCI bridge interface, PCIB_POWER_FOR_SLEEP(). Thisjhb2010-08-171-0/+1
| | | | | | | | | | method is used by the PCI bus driver to query the power management system to determine the proper device state to be used for a device during suspend and resume. For the ACPI PCI bridge drivers this calls acpi_device_pwr_for_sleep(). This removes ACPI-specific knowledge from the PCI and PCI-PCI bridge drivers. Reviewed by: jkim
* - Retire acpi_pcib_resume(). It is has just been an alias forjhb2010-08-051-9/+1
| | | | | | | | | bus_generic_resume() since the pci_link(4) driver was added. - Change the ACPI PCI-PCI bridge driver to inherit most of its methods from the generic PCI-PCI bridge driver. In particular, this will now restore PCI config registers for ACPI PCI-PCI bridges. Tested by: Oleg Sharoyko osharoiko of gmail
* Catch up with ACPICA 20090903.jkim2009-09-111-5/+9
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* Match PCI Express root bridge _HID directly instead ofjkim2009-07-131-1/+1
| | | | | | | relying on _CID. Reviewed by: jhb Approved by: re (kib)
* Rework the _BBN handling for Host-PCI bridges. Previously we only trustedjhb2009-06-091-18/+25
| | | | | | | | | | | | | | a _BBN value of 0 if it was for the first bridge encountered since some older systems returned _BBN of 0 for all bridges. However, some newer systems enumerate bridges with non-zero _BBN before bus 0 which is perfectly valid. Handle both cases by trusting the first bridge that has a _BBN of 0 and falling back to reading from non-standard config registers only for subsequent bridges with a _BBN of 0. We also only perform this check for segment (domain) 0. We assume that _BBN is always correct for segments other than 0. Tested by: Josef Moellers josef.moellers at fujitsu MFC after: 1 week
* Import ACPICA 20090521.jkim2009-06-051-1/+3
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* pcib_read_config and pcib_write_config take u_int params.imp2009-02-051-8/+9
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* Make the PCI code aware of PCI domains (aka PCI segments) so we canmarius2007-09-301-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | support machines having multiple independently numbered PCI domains and don't support reenumeration without ambiguity amongst the devices as seen by the OS and represented by PCI location strings. This includes introducing a function pci_find_dbsf(9) which works like pci_find_bsf(9) but additionally takes a domain number argument and limiting pci_find_bsf(9) to only search devices in domain 0 (the only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order to no longer report false positives when searching for siblings and dupe devices in the same domain respectively. Along with this change the sole host-PCI bridge driver converted to actually make use of PCI domain support is uninorth(4), the others continue to use domain 0 only for now and need to be converted as appropriate later on. Note that this means that the format of the location strings as used by pciconf(8) has been changed and that consumers of <sys/pciio.h> potentially need to be recompiled. Suggested by: jhb Reviewed by: grehan, jhb, marcel Approved by: re (kensmith), jhb (PCI maintainer hat)
* Revamp the MSI/MSI-X code a bit to achieve two main goals:jhb2007-05-021-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Simplify the amount of work that has be done for each architecture by pushing more of the truly MI code down into the PCI bus driver. - Don't bind MSI-X indicies to IRQs so that we can allow a driver to map multiple MSI-X messages into a single IRQ when handling a message shortage. The changes include: - Add a new pcib_if method: PCIB_MAP_MSI() which is called by the PCI bus to calculate the address and data values for a given MSI/MSI-X IRQ. The x86 nexus drivers map this into a call to a new 'msi_map()' function in msi.c that does the mapping. - Retire the pcib_if method PCIB_REMAP_MSIX() and remove the 'index' parameter from PCIB_ALLOC_MSIX(). MD code no longer has any knowledge of the MSI-X index for a given MSI-X IRQ. - The PCI bus driver now stores more MSI-X state in a child's ivars. Specifically, it now stores an array of IRQs (called "message vectors" in the code) that have associated address and data values, and a small virtual version of the MSI-X table that specifies the message vector that a given MSI-X table entry uses. Sparse mappings are permitted in the virtual table. - The PCI bus driver now configures the MSI and MSI-X address/data registers directly via custom bus_setup_intr() and bus_teardown_intr() methods. pci_setup_intr() invokes PCIB_MAP_MSI() to determine the address and data values for a given message as needed. The MD code no longer has to call back down into the PCI bus code to set these values from the nexus' bus_setup_intr() handler. - The PCI bus code provides a callout (pci_remap_msi_irq()) that the MD code can call to force the PCI bus to re-invoke PCIB_MAP_MSI() to get new values of the address and data fields for a given IRQ. The x86 MSI code uses this when an MSI IRQ is moved to a different CPU, requiring a new value of the 'address' field. - The x86 MSI psuedo-driver loses a lot of code, and in fact the separate MSI/MSI-X pseudo-PICs are collapsed down into a single MSI PIC driver since the only remaining diff between the two is a substring in a bootverbose printf. - The PCI bus driver will now restore MSI-X state (including programming entries in the MSI-X table) on device resume. - The interface for pci_remap_msix() has changed. Instead of accepting indices for the allocated vectors, it accepts a mini-virtual table (with a new length parameter). This table is an array of u_ints, where each value specifies which allocated message vector to use for the corresponding MSI-X message. A vector of 0 forces a message to not have an associated IRQ. The device may choose to only use some of the IRQs assigned, in which case the unused IRQs must be at the "end" and will be released back to the system. This allows a driver to use the same remap table for different shortage values. For example, if a driver wants 4 messages, it can use the same remap table (which only uses the first two messages) for the cases when it only gets 2 or 3 messages and in the latter case the PCI bus will release the 3rd IRQ back to the system. MFC after: 1 month
* Expand the MSI/MSI-X API to address some deficiencies in the MSI-X support.jhb2007-01-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - First off, device drivers really do need to know if they are allocating MSI or MSI-X messages. MSI requires allocating powerof2() messages for example where MSI-X does not. To address this, split out the MSI-X support from pci_msi_count() and pci_alloc_msi() into new driver-visible functions pci_msix_count() and pci_alloc_msix(). As a result, pci_msi_count() now just returns a count of the max supported MSI messages for the device, and pci_alloc_msi() only tries to allocate MSI messages. To get a count of the max supported MSI-X messages, use pci_msix_count(). To allocate MSI-X messages, use pci_alloc_msix(). pci_release_msi() still handles both MSI and MSI-X messages, however. As a result of this change, drivers using the existing API will only use MSI messages and will no longer try to use MSI-X messages. - Because MSI-X allows for each message to have its own data and address values (and thus does not require all of the messages to have their MD vectors allocated as a group), some devices allow for "sparse" use of MSI-X message slots. For example, if a device supports 8 messages but the OS is only able to allocate 2 messages, the device may make the best use of 2 IRQs if it enables the messages at slots 1 and 4 rather than default of using the first N slots (or indicies) at 1 and 2. To support this, add a new pci_remap_msix() function that a driver may call after a successful pci_alloc_msix() (but before allocating any of the SYS_RES_IRQ resources) to allow the allocated IRQ resources to be assigned to different message indices. For example, from the earlier example, after pci_alloc_msix() returned a value of 2, the driver would call pci_remap_msix() passing in array of integers { 1, 4 } as the new message indices to use. The rid's for the SYS_RES_IRQ resources will always match the message indices. Thus, after the call to pci_remap_msix() the driver would be able to access the first message in slot 1 at SYS_RES_IRQ rid 1, and the second message at slot 4 at SYS_RES_IRQ rid 4. Note that the message slots/indices are 1-based rather than 0-based so that they will always correspond to the rid values (SYS_RES_IRQ rid 0 is reserved for the legacy INTx interrupt). To support this API, a new PCIB_REMAP_MSIX() method was added to the pcib interface to change the message index for a single IRQ. Tested by: scottl
* Give Host-PCI bridge drivers their own pcib_alloc_msi() andjhb2006-12-121-2/+26
| | | | | | pcib_alloc_msix() methods instead of using the method from the generic PCI-PCI bridge driver as the PCI-PCI methods will be gaining some PCI-PCI specific logic soon.
* First cut at MI support for PCI Message Signalled Interrupts (MSI):jhb2006-11-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add 3 new functions to the pci_if interface along with suitable wrappers to provide the device driver visible API: - pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI(). '*count' here is an in and out parameter. The driver stores the desired number of messages in '*count' before calling the function. On success, '*count' holds the number of messages allocated to the device. Also on success, the driver can access the messages as SYS_RES_IRQ resources starting at rid 1. Note that the legacy INTx interrupt resource will not be available when using MSI. Note that this function will allocate either MSI or MSI-X messages depending on the devices capabilities and the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. Also note that the driver should activate the memory resource that holds the MSI-X table and pending bit array (PBA) before calling this function if the device supports MSI-X. - pci_release_msi(dev) backed by PCI_RELEASE_MSI(). This function releases the messages allocated for this device. All of the SYS_RES_IRQ resources need to be released for this function to succeed. - pci_msi_count(dev) backed by PCI_MSI_COUNT(). This function returns the maximum number of MSI or MSI-X messages supported by this device. MSI-X is preferred if present, but this function will honor the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. This function should return the largest value that pci_alloc_msi() can return (assuming the MD code is able to allocate sufficient backing resources for all of the messages). - Add default implementations for these 3 methods to the pci_driver generic PCI bus driver. (The various other PCI bus drivers such as for ACPI and OFW will inherit these default implementations.) This default implementation depends on 4 new pcib_if methods that bubble up through the PCI bridges to the MD code to allocate IRQ values and perform any needed MD setup code needed: - PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages. - PCIB_RELEASE_MSI() releases a group of MSI messages. - PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message. - PCIB_RELEASE_MSIX() releases a single MSI-X message. - Add default implementations for these 4 methods that just pass the request up to the parent bus's parent bridge driver and use the default implementation in the various MI PCI bridge drivers. - Add MI functions for use by MD code when managing MSI and MSI-X interrupts: - pci_enable_msi(dev, address, data) programs the MSI capability address and data registers for a group of MSI messages - pci_enable_msix(dev, index, address, data) initializes a single MSI-X message in the MSI-X table - pci_mask_msix(dev, index) masks a single MSI-X message - pci_unmask_msix(dev, index) unmasks a single MSI-X message - pci_pending_msix(dev, index) returns true if the specified MSI-X message is currently pending - Save the MSI capability address and data registers in the pci_cfgreg block in a PCI devices ivars and restore the values when a device is resumed. Note that the MSI-X table is not currently restored during resume. - Add constants for MSI-X register offsets and fields. - Record interesting data about any MSI-X capability blocks we come across in the pci_cfgreg block in the ivars for PCI devices. Tested on: em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X) Reviewed by: scottl, grehan, jfv MFC after: 2 months
* - Make pcib_devclass private to sys/dev/pci/pci_pci.c and change all thejhb2006-01-061-5/+3
| | | | | | | various pcib drivers to use their own private devclass_t variables for their modules. - Use the DEFINE_CLASS_0() macro to declare drivers for the various pcib drivers while I'm here.
* Commit a workaround to a problem with resource allocation. This helpsimp2005-09-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | with some Dell servers that booted w/o a problem[*] on 5.4, but failed with 6.0-BETA. On the PCI bus, when we do lazy resource allocation, we narrow the range requested as we pass through bridges to reflect how the bridges are programmed and what addresses they pass. However, when we're doing an allocation on a bus that's directly connected to a host bridge, no such translation can take place. We already had a fallback range for memory requests, but none for ioports. As such, provide a fallback for I/O ports so we don't allocate location 0, which will have undesired side effects when the resources are actually used. This fixes a problem with booting a Dell server with usb in the kernel. However, it is an unsatisfying solution. I don't like the hard coded value, and I think we should start narrowing the resources returned to not be in the so-called isa alias area (where the ranage & 0x0300 must be 0 iirc). Doing such filtering will have to wait for another day. This may be a good 6 candidate, maybe after its had a chance to be refined. Tested by: glebius@
* Canonize the include of acpi.h.obrien2005-09-111-1/+1
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* Fix SCM ID's.obrien2005-03-021-2/+4
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* Rework the ACPI PCI link code.jhb2004-11-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Use a new-bus device driver for the ACPI PCI link devices. The devices are called pci_linkX. The driver includes suspend/resume support so that the ACPI bridge drivers no longer have to poke the links to get them to handle suspend/resume. Also, the code to handle which IRQs a link is routed to and choosing an IRQ when a link is not already routed is all contained in the link driver. The PCI bridge drivers now ask the link driver which IRQ to use once they determine that a _PRT entry does not use a hardwired interrupt number. - The new link driver includes support for multiple IRQ resources per link device as well as preserving any non-IRQ resources when adjusting the IRQ that a link is routed to. - The entire approach to routing when using a link device is now link-centric rather than pci bus/device/pin specific. Thus, when using a tunable to override the default IRQ settings, one now uses a single tunable to route an entire link rather than routing a single device that uses the link (which has great foot-shooting potential if the user tries to route the same link to two different IRQs using two different pci bus/device/pin hints). For example, to adjust the IRQ that \_SB_.LNKA uses, one would set 'hw.pci.link.LNKA.irq=10' from the loader. - As a side effect of having the link driver, unused link devices will now be disabled when they are probed. - The algorithm for choosing an IRQ for a link that doesn't already have an IRQ assigned is now much closer to the one used in $PIR routing. When a link is routed via an ISA IRQ, only known-good IRQs that the BIOS has already used are used for routing instead of using probabilities to guess at which IRQs are probably not used by an ISA device. One change from $PIR is that the SCI is always considered a viable ISA IRQ, so that if the BIOS does not setup any IRQs the kernel will degenerate to routing all interrupts over the SCI. For non ISA IRQs, interrupts are picked from the possible pool using a simplistic weighting algorithm. Tested by: ru, scottl, others on acpi@ Reviewed by: njl
* unsigned long -> u_longnjl2004-11-091-1/+1
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* Add TUNABLE_LONG and TUNABLE_ULONG, and use the latter for thedes2004-10-311-2/+2
| | | | | | | hw.pci.host_mem_start tunable. Add comments to TUNABLE_INT and TUNABLE_QUAD recommending against their use. MFC after: 3 weeks
* Whitespace cleanupdes2004-10-311-4/+4
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* Make the lower range of the memory area 0x80000000 again. Alsoimp2004-10-111-1/+5
| | | | | | introduce hw.{pci,acpi}.host_mem_start tunable to change this. MFC: ASAP
* For older systems with ACPI which don't have a pci <-> pci bridge,imp2004-10-061-3/+3
| | | | | | | allocate unallocated memory resources from the top 32MB of the address space rather than the top 2GB. While the latter works on some chipsets, it fails badly on others. 32MB is more conservative and matches what cheap harware from this era is hardwired to pass.
* Add a couple of macros to extract the PCI slot (device) and function fromjhb2004-09-221-2/+2
| | | | | an ACPI _ADR value and use that rather than inlining the same shifts and masks everywhere.
* Re-work ACPI PCI IRQ routing (_PRT, link devices). The old approach wasnjl2004-08-111-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | incomplete in that the PRT routing was not aware of link programming. Fix this by doing all routing through the link devices. The new algorithm for setting up links is: 1. Read _CRS to get current setting. If invalid (not in _PRS), then set to 0. 2. Attempt to call _DIS on the link. If successful, mark the link as not routed. Otherwise, assume it still is. Then when a routing request occurs: 3. Update weights for all IRQs 4. Attempt to route the initial IRQ if valid 5. If that fails, walk through the sorted list, attempting to route IRQs. 6. Configure the trigger/polarity based on _PRS. Other changes: * Add acpi_pci_find_prt() to look up the PRT entry for a given device and acpi_pci_link_route() to select/route the best IRQ for it. * Remove duplicated code in acpi_pcib_route_interrupt() that picked the first IRQ from _PRS. * Remove unneeded arguments from acpi_pcib_resume() and friends. * Ignore _STA on link devices but report if it seems strange. * Add a prt_source handle to the PRT structure since the ACPI struct ACPI_PCI_ROUTING_TABLE uses a fixed-size entry for it. We'll need to dynamically size this object if we want to use it the same way ACPI-CA does. Null-terminate the source. Tested by: Luo Hong <luohong99_at_mails.tsinghua.edu.cn>, Jeffrey Katcher <jmkatcher_at_yahoo.com> Info from: jhb, Len Brown (Intel)
* Make the default memory range in the top 2GB of ram in the hopes thatimp2004-07-041-3/+5
| | | | | | | this more accurately reflects what the underlying hardware of most acpi machines that don't have children pci busses. We still need a better way to get this information from acpi/hardware.
* Move flags into a private ivar so it can't collide with device flags.njl2004-06-301-0/+10
| | | | | | | Unify the code to disable GPEs with the enable code. Shutdown is handled the same way. ACPI now does all wake/sleep prep for child devices so now they no longer need to call external functions in the suspend/resume path. Add the flags to non-ACPI busses (i.e., pci).
* Use the acpi_id_probe() method instead of acpi_MatchHid(), which is nownjl2004-06-291-8/+8
| | | | static.
* Add support to ACPI to manage its own resources. Previously, resourcenjl2004-06-131-1/+1
| | | | | | | | | | | | | | | | | allocation was passed up to nexus. Now, we probe sysresource objects and manage the resources they describe in a local rman pool. This helps devices which attach/detach varying resources (like the _CST object) and module loads/unloads. The allocation/release routines now check to see if the resource is described in a child sysresource object and if so, allocate from the local rman. Sysresource objects add their resources to the pool and reserve them upon boot. This means sysresources need to be probed before other ACPI devices. Changes include: * Add ordering to the child device probe. The current order is: system resource objects, embedded controllers, then everything else. * Make acpi_MatchHid take a handle instead of a device_t arg. * Replace acpi_{get,set}_resource with the generic equivalents.
* Add missing <sys/module.h> includesphk2004-05-301-0/+1
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* Style fixes.njl2004-05-281-56/+54
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* Add MODULE_DEPEND entries so some of these drivers can eventually benjl2004-04-091-0/+1
| | | | loaded separately from ACPI (i.e., embedded use).
* Omnibus PCI commit:imp2004-04-091-1/+22
| | | | | | | | | | | | | | o Save and restore bars for suspend/resume as well as for D3->D0 transitions. o preallocate resources that the PCI devices use to avoid resource conflicts o lazy allocation of resources not allocated by the BIOS. o set unattached drivers to state D3. Set power state to D0 before probe/attach. Right now there's two special cases for this (display and memory devices) that need work in other areas of the tree. Please report any bugs to me.
* Change to acpi_{Get,Set}Integer to provide both methods. Convert allnjl2004-03-031-3/+3
| | | | | | callers to the new API. Submitted by: Mark Santcroos <marks@ripe.net>
* Prefer new location of pci include files (which have only been in theimp2003-08-221-2/+2
| | | | | tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
* Consistently use the BSD u_int and u_short instead of the SYSV uint andjhb2003-08-071-1/+1
| | | | | | | ushort. In most of these files, there was a mixture of both styles and this change just makes them self-consistent. Requested by: bde (kern_ktrace.c)
* - Assume a bus number of zero if evaluating _BBN fails, not if it succeeds.jhb2002-11-251-9/+8
| | | | | | | | This was effectively rendering _BBN useless. - Cleanup handling of the busok variable a bit. Submitted by: marcel (1) Approved by: re (rwatson)
* According to the ACPI spec, the bus number of the child PCI bus of a hostjhb2002-11-221-7/+52
| | | | | | | | | | | | | | | | | | | | | | to PCI bridge can be read be evaluating the _BBN method of the host to PCI device. Unfortunately, there appear to be some lazy/ignorant/moronic/ whatever BIOS writers that return 0 for _BBN for all host to PCI bridges in the system. On a system with a single host to PCI bridge this is not a problem as the child bus of that single bridge will be bus 0 anyway. However, on systems with multiple host to PCI bridges and l/i/m/w BIOS writers this is a major problem resulting in all but the first host to PCI bridge failing to attach. So, this adds a workaround. If the _BBN of a host to PCI bridge is zero and pcib0 already exists and is not us, the we use _ADR to look up our PCI function and slot (we currently assume we are on bus 0) and use that to call host_pcib_get_busno() to try and extract our bus number from config registers on the host to PCI bridge device. If that fails, then we make an evil assumption that ACPI's _SB_ namespace lays out the host to PCI bridges in ascending order and use our pcib unit number as our bus number. Approved by: re
* Make sure that ACPI PCI driver probe routine call pci_cfgregopen()iwasaki2002-10-051-0/+3
| | | | | | before start accessing PCI config space. Reviewed by: jhb
* Add code for ACPI PCI link object manipulation.iwasaki2002-10-051-1/+10
| | | | | | | | | This allocate the best IRQ to boot-disable devices (have IRQ 0). Allocated IRQ will be used for PCI interrupt routing when ACPI is enabled. Note that verbose messaging enabled for the time being so that people can easily notice the strange behavior if it happened.
* Overhaul the ACPI PCI bridge driver a bit:jhb2002-08-261-344/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add an ACPI PCI-PCI bridge driver (the previous driver just handled Host-PCI bridges) that is a PCI driver that is a subclass of the generic PCI-PCI bridge driver. It overrides probe, attach, read_ivar, and pci_route_interrupt. - The probe routine only succeeds if our parent is an ACPI PCI bus which we test for by seeing if we can read our ACPI_HANDLE as an ivar. - The attach routine saves a copy of our handle and calls the new acpi_pcib_attach_common() function described below. - The read_ivar routine handles normal PCI-PCI bridge ivars and adds an ivar to return the ACPI_HANDLE of the bus this bridge represents. - The route_interrupt routine fetches the _PRT (PCI Interrupt Routing Table) from the bridge device's softc and passes it off to acpi_pcib_route_interrupt() to route the interrupt. - Split the old ACPI Host-PCI bridge driver into two pieces. Part of the attach routine and most of the route_interrupt routine remain in acpi_pcib.c and are shared by both ACPI PCI bridge drivers. - The attach routine verifies the PCI bridge is present, reads in the _PRT for the bridge, and attaches the child PCI bus. - The route_interrupt routine uses the passed in _PRT to route a PCI interrupt. The rest of the driver is the ACPI Host-PCI bridge specific bits that live in acpi_pcib_acpi.c. - We no longer duplicate pcib_maxslots but use it directly. - The driver now uses the pcib devclass instead of its own devclass. This means that PCI busses are now only children of pcib devices. - Allow the ACPI_HANDLE for the child PCI bus to be read as an ivar of the child bus. - Fetch the _PRT for routing PCI interrupts directly from our softc instead of walking the devclass to find ourself and then fetch our own softc. With this change and the new ACPI PCI bus driver, ACPI can now properly route interrupts for devices behind PCI-PCI bridges. That is, the Itanium2 with like 10 PCI busses can now boot ok and route all the PCI interrupts. Hopefully this will also fix problems people are having with CardBus bridges behind PCI-PCI bridges not properly routing interrupts when ACPI is used. Tested on: i386, ia64
* In acpi_pcib_route_interrupt(), the code claims to check to see if a PCIjhb2002-08-261-2/+2
| | | | | | | LNK device (interrupt source provider sort of) is present before using it, but the code actually tested the status (_STA) of the PCI bridge device doing the routing, not the actual LNK device. Fix it to check the status of the LNK device.
* Brutally deal with __func__ being 'const char *' on gcc-3.1.peter2002-05-191-2/+2
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* Fix error introduced in the 20020217 update, where GetPossibleResourcesmsmith2002-03-211-1/+1
| | | | | | was spammed with GetCurrentResources. Submitted by: Munehiro Matsuda <haro@h4.dion.ne.jp>
* Match namespace cleanup changes in ACPI CA 20020217 update.msmith2002-02-231-19/+37
| | | | | | | Use ACPI_SUCCESS/ACPI_FAILURE consistently. The AcpiGetInto* interfaces are obsoleted by ACPI_ALLOCATE_BUFFER. Use _ADR as well as _BBN to get our bus number.
* Staticise devclasses and some unnecessarily global variables.msmith2002-01-081-1/+1
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* Make the interrupt routing a bit less chatty unless bootverbose is set.dfr2001-10-071-3/+5
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* Fix a stack trashing bug when int != sizeof(pointer)peter2001-10-061-1/+3
| | | | This fixes the ia64 boot! We have scsi disks!
* Update usage of AcpiEnableEvent to reflect a new argument.msmith2001-10-041-4/+3
| | | | | | | | Fix acpi_DeviceIsPresent to check for valid _STA data and to check the "present" and "functioning" bits. Use acpi_DeviceIsPresent in acpi_pcib rather than rolling our own (also broken) version.
* Updates to match the ACPI CA 20010816 import:msmith2001-08-261-3/+5
| | | | | - New debug macro (ACPI_DEBUG_PRINT), reducing debug-case code size. - New debug level/subsystem codes.
* Shoud build resources in the _CRS buffer. Oops.msmith2001-08-031-1/+1
| | | | Submitted by: "neckpain@nettaxi.com" <neckpain@nettaxi.com>
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