| Commit message (Expand) | Author | Age | Files | Lines |
* | Add CPU_ARM9E | kevlo | 2007-10-31 | 1 | -0/+1 |
* | Add an option to be able to override the value of the AT91 master clock | cognet | 2007-10-25 | 1 | -0/+1 |
* | Add CPU_XSCALE_81342 before I forget again. | cognet | 2007-06-11 | 1 | -1/+2 |
* | Add two new options, FLASHADDR, which defines the address the flash is | cognet | 2007-02-19 | 1 | -0/+2 |
* | MFp4: add BWCT kernel configuration | ticso | 2007-01-05 | 1 | -0/+1 |
* | add CPU_XSCALE_IXP425 | sam | 2006-11-19 | 1 | -0/+1 |
* | Finally bring it support for the i80219 XScale processor. | cognet | 2006-08-24 | 1 | -0/+1 |
* | Rewrite ARM_USE_SMALL_ALLOC so that instead of the current behavior, it maps | cognet | 2006-08-08 | 1 | -0/+1 |
* | For the moment, make board configuration a compile time option. This | imp | 2006-07-14 | 1 | -0/+2 |
* | Convert the last offender, the SA1110 port, to ARM32_NEW_VM_LAYOUT, and | cognet | 2006-06-06 | 1 | -1/+0 |
* | Make VERBOSE_INIT_ARM compile by fixing various printf formats, and add it | cognet | 2006-06-06 | 1 | -0/+1 |
* | Resurrect Skyeye support : | cognet | 2006-05-13 | 1 | -1/+2 |
* | Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as a | cognet | 2006-04-06 | 1 | -0/+1 |
* | The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel option | cognet | 2005-12-09 | 1 | -0/+1 |
* | Add ARM_USE_SMALL_ALLOC. | cognet | 2005-06-07 | 1 | -0/+1 |
* | Add a new option, ARM_CACHE_LOCK_ENABLE (I forgot it in my last commit). | cognet | 2005-02-26 | 1 | -0/+1 |
* | Add a new option, ARM32_NEW_VM_LAYOUT. When set, we try to put up to 4 | cognet | 2004-11-10 | 1 | -0/+2 |
* | Add new options : | cognet | 2004-09-23 | 1 | -5/+10 |
* | Add config magic for arm. | cognet | 2004-05-14 | 1 | -0/+6 |