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* Add options I missed in the additionnal AT91 support commits.cognet2010-10-071-0/+3
* Now that we are fully FDT-driven on MRVL platforms, remove PHYSMEM_SIZE option.raj2010-07-191-1/+0
* Convert Marvell ARM platforms to FDT convention.raj2010-06-131-1/+0
* Add support for FA626TE.kevlo2010-05-041-0/+1
* Add support for Cavium Econa CNS11XX ARM boards. These boards wererpaulo2010-01-041-0/+1
* Introduce MII_ADDR_BASE option on ARM, which allows to override the defaultraj2009-08-251-0/+1
* add IXP4XX_FLASH_SIZE config knob that can be used to override the defaultsam2009-03-101-0/+1
* Merge WIP from p4:sam2008-12-131-0/+1
* - Obtain main clock frequency dynamically based on CKGR_MCFR registerstas2008-11-301-0/+1
* Introduce basic support for Marvell families of system-on-chip ARM devices:raj2008-10-131-0/+4
* Support for the XScale PXA255 SoC as found on the Gumstix Basix and Connexbenno2008-06-061-0/+1
* Add CPU_ARM9Ekevlo2007-10-311-0/+1
* Add an option to be able to override the value of the AT91 master clockcognet2007-10-251-0/+1
* Add CPU_XSCALE_81342 before I forget again.cognet2007-06-111-1/+2
* Add two new options, FLASHADDR, which defines the address the flash iscognet2007-02-191-0/+2
* MFp4: add BWCT kernel configurationticso2007-01-051-0/+1
* add CPU_XSCALE_IXP425sam2006-11-191-0/+1
* Finally bring it support for the i80219 XScale processor.cognet2006-08-241-0/+1
* Rewrite ARM_USE_SMALL_ALLOC so that instead of the current behavior, it mapscognet2006-08-081-0/+1
* For the moment, make board configuration a compile time option. Thisimp2006-07-141-0/+2
* Convert the last offender, the SA1110 port, to ARM32_NEW_VM_LAYOUT, andcognet2006-06-061-1/+0
* Make VERBOSE_INIT_ARM compile by fixing various printf formats, and add itcognet2006-06-061-0/+1
* Resurrect Skyeye support :cognet2006-05-131-1/+2
* Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as acognet2006-04-061-0/+1
* The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel optioncognet2005-12-091-0/+1
* Add ARM_USE_SMALL_ALLOC.cognet2005-06-071-0/+1
* Add a new option, ARM_CACHE_LOCK_ENABLE (I forgot it in my last commit).cognet2005-02-261-0/+1
* Add a new option, ARM32_NEW_VM_LAYOUT. When set, we try to put up to 4cognet2004-11-101-0/+2
* Add new options :cognet2004-09-231-5/+10
* Add config magic for arm.cognet2004-05-141-0/+6
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