| Commit message (Collapse) | Author | Age | Files | Lines |
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whole the physical memory, cached, using 1MB section mappings. This reduces
the address space available for user processes a bit, but given the amount of
memory a typical arm machine has, it is not (yet) a big issue.
It then provides a uma_small_alloc() that works as it does for architectures
which have a direct mapping.
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saves space in the final kernel, but at the expense of flexibility to
boot the same kernel accross a family of boards.
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completely nuke the !ARM32_NEW_VM_LAYOUT case.
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as an option.
Submitted by: Max N. Boyarov <m.boyarov at bsd dot by>
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Add a new option, SKYEYE_WORKAROUNDS, which as the name suggests adds
workarounds for things skyeye doesn't simulate. Specifically :
- Use USART0 instead of DBGU as the console, make it not use DMA, and manually provoke an interrupt when we're done in the transmit function.
- Skyeye maintains an internal counter for clock, but apparently there's
no way to access it, so hack the timecounter code to return a value which
is increased at every clock interrupts. This is gross, but I didn't find a
better way to implement timecounters without hacking Skyeye to get the
counter value.
- Force the write-back of PTEs once we're done writing them, even if they
are supposed to be write-through. I don't know why I have to do that.
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timecounter (because gxemul doesn't emule it yet).
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to override the frequency
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L2 tables in one page, instead of the old 1 L2 table <=> 1 page behavior.
While I'm there, add ARM9_CACHE_WRITE_THROUGH, which I forgot last time.
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PHYSADDR : Address of the physical memory
KERNPHYSADDR : Physical address where the kernel starts
KERNVIRTADDR : Virtual address of the kernel
STARTUP_PAGETABLE_ADDR : Where to put the page table at bootstrap
+ Xscale specific options
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