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* Use correct wbinv operation in pmap_l2cache_wbinv_range().raj2009-08-131-1/+1
* Merge the remainder of kern_vimage.c and vimage.h into vnet.c andrwatson2009-08-011-1/+0
* Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar tojhb2009-07-241-1/+1
* Make dcache_inv_range() point to the proper routines on ARM9 and ARM9E/ARM10.raj2009-07-211-2/+2
* ARM pmap fixes.raj2009-07-203-5/+7
* Add IEEE80211_SUPPORT_MESH, following similar change to nanobsd andrpaulo2009-07-172-0/+2
* Add support to the virtual memory system for configuring machine-alc2009-07-122-2/+5
* Cleanup ALIGNED_POINTER:sam2009-07-051-0/+7
* Map DPCPU pages into ARM kernel VA space.raj2009-07-013-3/+11
* Correct the #endif comment.alc2009-06-261-1/+1
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/rwatson2009-06-262-5/+5
* This change is the next step in implementing the cache control functionalityalc2009-06-261-0/+35
* temporarily disable optional uarts; apparently we hang when probing themsam2009-06-251-9/+9
* Enable all populated TWSI (I2C) controllers on Marvell SOCs.raj2009-06-254-4/+9
* Fix typo.cognet2009-06-241-1/+1
* Fix typo.cognet2009-06-241-1/+1
* Introduce ata(4) support for Marvell integrated SATA controllers (found onraj2009-06-249-0/+958
* Implement a facility for dynamic per-cpu variables.jeff2009-06-239-1/+41
* Now that we have UARTs running with fast interrupt handlers the atasam2009-06-232-35/+208
* use consistent stylesam2009-06-231-1/+1
* kill left over cruftsam2009-06-221-2/+0
* enable optional GPS+RS485 uartssam2009-06-221-0/+14
* o add a bus space tag that forces a 2usec delay between r/w ops; this issam2009-06-224-11/+120
* fix typosam2009-06-221-1/+1
* o remove hack to write UUE+RTOIE in the uart's IER; force them with hintssam2009-06-223-21/+10
* hook arm_post_filter to ACK GPIO interrupts; this fixes the interruptsam2009-06-221-0/+8
* always define Cambria GPS+RS485 mappings as they are no longer conditionalsam2009-06-221-4/+0
* map the optional GPS and RS485 uart's on the Gateworks Cambria boardsam2009-06-222-21/+32
* add ixp425_set_gpio to program the gpio interrupt typesam2009-06-223-10/+22
* rewrite arm_get_next_irq to always make forward progress (should be optimized)sam2009-06-221-8/+20
* kill stray whitespacesam2009-06-221-2/+2
* move logic to ACK a GPIO to a separate functionsam2009-06-221-3/+9
* swap order in ddb show gpio printfsam2009-06-221-2/+2
* make type use consistentsam2009-06-221-1/+1
* Disable write-back until I figure out what's wrong with it on the i81342.cognet2009-06-211-7/+1
* Track the kernel mapping of a physical page by a new entry in vm_pagethompsa2009-06-182-41/+163
* enable npe-a now that it workssam2009-06-171-5/+5
* Add workaround to get IXP435 NPE-A working: reseting NPE-A after NPE-Csam2009-06-171-28/+24
* correct data/instruction memory sizes for non-ixp425 parts (thesesam2009-06-171-2/+8
* remove IAL vestige for defining the max data/instruction memory size;sam2009-06-171-9/+2
* o correct default miibase for NPE-B and NPE-C; these values aresam2009-06-171-7/+27
* add ixp4xx_write_feature_bitssam2009-06-172-0/+7
* Move the memory layout definitions and logic from mvreg.h to mvwin.hmarcel2009-06-129-245/+287
* devclass_find_free_unit(xxx, 0) is identical to -1 for mostimp2009-06-121-1/+1
* strict kobj signatures: number of fixes for arm architectureavg2009-06-1110-19/+22
* Eliminate devclass_find_free_unit call here, since -1 gives the sameimp2009-06-101-1/+1
* Pass the previously returned IRQ back to arm_get_next_irq() so thatmarcel2009-06-099-10/+10
* Disable interrupts to allow booting on firmware (e.g. U-Boot) thatmarcel2009-06-091-0/+5
* Invalidate cache in pmap_remove_all() on ARM.raj2009-06-081-0/+12
* maintain existing stylesam2009-05-301-2/+2
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