summaryrefslogtreecommitdiffstats
path: root/sys/arm
Commit message (Collapse)AuthorAgeFilesLines
* - Fix two minor errors in at91 code.stas2008-11-182-2/+2
| | | | | | PR: arm/128959 Submitted by: Bjorn Konig <bkoenig@alpha-tierchen.de> Approved by: kib (mentor)
* ARM pmap style(9) and cosmetics.raj2008-11-061-5/+5
|
* Auto-size kernel page tables allocation on Marvell systems.raj2008-11-061-11/+9
| | | | | | This allows mini dumps to fully work for these platforms. Obtained from: Juniper Networks, Semihalf
* Support kernel crash mini dumps on ARM architecture.raj2008-11-066-4/+570
| | | | Obtained from: Juniper Networks, Semihalf
* Allow card reader bridge driver to report maximum supported transfer size.mav2008-10-291-0/+4
| | | | | | | | | sdhci supports up to 65535 blocks transfers, at91_mci - one block. Enable multiblock operations disabled before to follow at91_mci driver limitations. Reviewed by: imp@
* - Add stream bus_space operations.stas2008-10-261-0/+36
| | | | | | Reviewed by: cognet Approved by: kib (mentor, implicit) MFC after: 1 week
* - Add a missing NULL-pointer check.stas2008-10-261-2/+4
| | | | | | Reviewed by: cognet Approved by: kib (mentor, implicit) MFC after: 3 days
* Retire the MALLOC and FREE macros. They are an abomination unto style(9).des2008-10-231-2/+2
| | | | MFC after: 3 months
* Add arm/conf/DEFAULTS and populate it with:marcel2008-10-2315-28/+11
| | | | | | | | | | machine arm device mem options GEOM_BSD options GEOM_MBR Remove the first two from all kernel configuration files and change geom_bsd and geom_mbr from standard to optional.
* Eliminate flushing of L2 cache in ARM context switch routines.raj2008-10-161-8/+0
| | | | | | | With VIPT L2 cache such syncing not only is redundant, but also a performance penalty. Pointed out by: cognet
* correct sizeof calculationsam2008-10-141-1/+1
| | | | | | PR: arm/128095 Submitted by: Henning Petersen MFC after: 1 week
* Initial support of loader(8) for ARM machines running U-Boot.raj2008-10-143-1/+82
| | | | | | | | | | This uses the common U-Boot support lib (sys/boot/uboot, already used on FreeBSD/powerpc), and assumes the underlying firmware has the modern API for stand-alone apps enabled in the config (CONFIG_API). Only netbooting is supported at the moment. Obtained from: Marvell, Semihalf
* Add kernel config files for Marvell development boards.raj2008-10-143-0/+235
| | | | | | | | | | | | | | | | FreeBSD 8-CURRENT was tested and run successfully on the following eval boards and devices : * DB-88F5182, DB-88F5281 (Orion based) * DB-88F6281, RD-88F6281 (Kirkwood based) * DB-78100 (Discovery based) For more detailed info on build instructions and other examples please refer to http://wiki.freebsd.org/FreeBSDMarvell Obtained from: Marvell, Semihalf
* Introduce basic support for Marvell families of system-on-chip ARM devices:raj2008-10-1328-1/+5698
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Orion - 88F5181 - 88F5182 - 88F5281 * Kirkwood - 88F6281 * Discovery - MV78100 The above families of SOCs are built around CPU cores compliant with ARMv5TE instruction set architecture definition. They share a number of integrated peripherals. This commit brings support for the following basic elements: * GPIO * Interrupt controller * L1, L2 cache * Timers, watchdog, RTC * TWSI (I2C) * UART Other peripherals drivers will be introduced separately. Reviewed by: imp, marcel, stass (Thanks guys!) Obtained from: Marvell, Semihalf
* One more L2 cache synchronization call that didn't make the previous commit.raj2008-10-131-0/+2
|
* Provide L2 cache synchronization (write back + invalidation) on ARM.raj2008-10-135-12/+134
| | | | | | | Note the cpu_l2cache_wbinv_* routines are no-ops on systems not populated with L2 caches. Obtained from: Marvell, Semihalf
* Do not use cached page for temporary mapping in pmap_zero_page_generic()raj2008-10-131-10/+8
| | | | | | | | | | | | | | | | | The physical page which we clear is accessed via additional temp kernel mapping for the period of zeroing operation. However in systems with virtual d-cache (most ARMs) when write-allocate feature is enabled, we can have modified but unflushed content pertaining to this physical page still in the d-cache due to its primary (pre-existing) mapping. In such scenario that cached content upon flush is likely to overwrite [portions of] the physical page we want to zero here.. This is a general problem with multiple virtual mappings covering the same physical page with write-allocate and virtual d-cache: there is inherent potential for corruptions of this kind, which are not easily resolved; it is best policy that such multiple mappings be not allowed. Obtained from: Marvell, Semihalf
* Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.raj2008-10-135-4/+514
| | | | | | | They are compliant with ARMv5TE and integrated on 88F6281 (Kirkwood) and MV78100 (Discovery) system-on-chip families. Obtained from: Marvell, Semihalf
* Use bus_get_dma_tag() instead of NULL here. Not really needed for atmelimp2008-10-074-17/+18
| | | | at the moment, but it is more correct.
* Allow static hints to override kenv.bms2008-10-021-0/+5
|
* Collect N identical (or near identical) mkdumpheader() implementations intopeter2008-10-011-22/+1
| | | | one, as threatened in the comment. Textdump magic can be passed in.
* Properly implement read only. Also, the caps implementation is wrongimp2008-09-301-5/+1
| | | | here, so I'm backing it out.
* Implement MMCBR_IVAR_CAPS for AT91 MCI device.imp2008-09-281-0/+5
| | | | Submitted by: mav@ (well, not this one, but the base impl was)
* White space nit.imp2008-09-281-1/+0
|
* Replace all calls to minor() with dev2unit().ed2008-09-271-4/+4
| | | | | | | | | | | | | | | After I removed all the unit2minor()/minor2unit() calls from the kernel yesterday, I realised calling minor() everywhere is quite confusing. Character devices now only have the ability to store a unit number, not a minor number. Remove the confusion by using dev2unit() everywhere. This commit could also be considered as a bug fix. A lot of drivers call minor(), while they should actually be calling dev2unit(). In -CURRENT this isn't a problem, but it turns out we never had any problem reports related to that issue in the past. I suspect not many people connect more than 256 pieces of the same hardware. Reviewed by: kib
* Change the static struct sysentvec and struct Elf_Brandinfo initializerskib2008-09-241-44/+45
| | | | | | | | | | | to the C99 style. At least, it is easier to read sysent definitions that way, and search for the actual instances of sigcode etc. Explicitely initialize sysentvec.sv_maxssiz that was missed in most sysvecs. No objection from: jhb MFC after: 1 month
* Bandaid: disable interrupts to make sure intr_enabled and the IER registercognet2008-09-111-3/+8
| | | | | are in sync. I'm not sure why it is needed, and why it wouldn't be on other arm platforms, but it prevents a lockup under heavy I/O.
* Remove the unused field "pc_prvspace" from the MD fields for the structcognet2008-09-111-6/+1
| | | | | | | pcpu. There's not even a thing such as a "struct pcup". While I'm there, remove a comment that makes no sense for arm. Spotted out by: Mark Tinguely
* ARM nexus style(9) improvements.raj2008-09-111-34/+31
|
* ARM interrupts improvements.raj2008-09-113-14/+16
| | | | | | | | | | | | | - Fix nexus_setup_intr() abuse of setting up multiple IRQs in one go. Calling arm_setup_irqhandler() in loop is bogus, as there's just one cookie given from the caller and it is overwritten in each iteration so that only the last handler's cookie value prevails. - Proper intr masking/unmasking handling: the IRQ source is masked at PIC level only after the last handler has been removed from the list. Reviewed by: cognet, imp, sam, stass Obtained from: Grzegorz Bernacki gjb ! semihalf dot com
* IXP425: split handling of the two QMGR interrupts so they are separatelyraj2008-09-111-14/+42
| | | | | | | managed. Adjust ixpqmgr_{attach,detach} to comply with device_* interface. Reviewed by: cognet, imp, sam, stass Tested by: cognet
* Commit the no-brainer parts of my space saving kernel experiments. Weimp2008-09-081-1/+5
| | | | | | | don't inline the locking primitives, and only grab those parts of mii that we really need. Other space optimizations are too agressive for the generic file (removing all of usb, and loading it as kernel modules).
* Minor cleanup of this config file:imp2008-09-071-9/+12
| | | | | | | | o It has been tested only on KB9202, KB9202A and KB9202B boards o Better comments about hints o option<space><tab> o Add newer SX_NOINLINE option. o Fix a few comments
* Turn some lame pseudo-code into a less lame comment.imp2008-09-051-8/+1
|
* Kill bogus #if 0'd stuff for interrupts. They don't happen, and thisimp2008-09-051-16/+0
| | | | | | | driver will need more serious help to work with an interrupt driven path. There's many subtleties in driving the DMA engine with interrupts in many configurations. Best to not "guess" what the right way would be and mislead people.
* Kill vestiges of the special case code we once had in place for usbimp2008-09-051-12/+2
| | | | | | memory allocation. It was change to include the range in the normal memory area, so these ifdef'd out special cases are no longer useful to keep around.
* Kill bogus #if 1. There's no need for it since usb works these days.imp2008-09-051-2/+0
|
* Use a locally assigned address rather than stealing Atmel's whichimp2008-08-311-4/+6
| | | | might cause a conflict...
* - Fix comment.stas2008-08-311-3/+3
| | | | | | | | - Set U/L bit of generated ethernet address to 1 to not clash with Atmel assigned addresses. Suggested by: yar Approved by: kib (mentor)
* - Try to look for MAC address in all SA registers, not only in thestas2008-08-301-16/+37
| | | | | | | | | | | first one. U-boot, for example, uses the second register to store MAC.[1] - Use random MAC address if none configured instead of failing. Submitted by: Bjorn Konig <bkoenig@alpha-tierchen.de> [1] Reviewed by: imp Approved by: kib (mentor) MFC after: 1 week
* - Style fix.stas2008-08-301-1/+1
| | | | | Approved by: kib (mentor) MFC after: 1 week
* Whitespace nit.imp2008-08-231-1/+1
|
* Provide hooks into the GPIO lines and the ability to set/clearimp2008-08-192-0/+47
| | | | | | | interrupts from them. This should be more generalized, but is sufficient for now. Submitted by: Hans Petter Selasky
* Use the proper clock domain for the usb host controller.imp2008-08-191-1/+1
| | | | Submitted by: Hans Petter Selasky
* Add IRQ line for usb device. I'm not 100% sure this is the rightimp2008-08-191-1/+1
| | | | | | | place to add this connection, since the interrupt is for a GPIO pin, but since we have no alternative at the moment... Submitted by: Hans Petter Selasky
* Export 'struct pcpu' to userland w/o requiring _KERNEL. A few portsjhb2008-08-191-0/+4
| | | | | | | already define _KERNEL to get to this and I'm about to add hooks to libkvm to access per-CPU data. MFC after: 1 week
* Commit step 1 of the vimage project, (network stack)bz2008-08-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | virtualization work done by Marko Zec (zec@). This is the first in a series of commits over the course of the next few weeks. Mark all uses of global variables to be virtualized with a V_ prefix. Use macros to map them back to their global names for now, so this is a NOP change only. We hope to have caught at least 85-90% of what is needed so we do not invalidate a lot of outstanding patches again. Obtained from: //depot/projects/vimage-commit2/... Reviewed by: brooks, des, ed, mav, julian, jamie, kris, rwatson, zec, ... (various people I forgot, different versions) md5 (with a bit of help) Sponsored by: NLnet Foundation, The FreeBSD Foundation X-MFC after: never V_Commit_Message_Reviewed_By: more people than the patch
* Add locking to the various iicbus(4) bridge drivers:jhb2008-08-042-0/+16
| | | | | | | | | | | | | | | | | | | | | - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
* Do not modify td->td_intr_nesting_level, it is now done in the MI code.cognet2008-08-041-3/+0
| | | | | | This fixes the cpu time being falsely reported as interrupt time. MFC after: 3 days
* Fix ARM nocache allocator:raj2008-08-041-5/+4
| | | | | | | | | | | | - let the loop iterate every page (as intended), and not some multiplies (which led to a fake exhaustion of the ARM_NOCACHE_KVA_SIZE) - eliminate using MIN(): it compared number of pages vs. address (ARM_TP_ADDRESS), which was bogus Reviewed by: cognet, imp Obtained from: Piotr Ziecik kosmo ! semihalf dot com MFC after: 3 days
OpenPOWER on IntegriCloud