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* Start all license statements with /*-imp2005-01-05116-165/+121
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* Modify pmap_enter_quick() so that it expects the page queues to be lockedalc2004-12-231-3/+0
| | | | | | | | | | | on entry and it assumes the responsibility for releasing the page queues lock if it must sleep. Remove a bogus comment from pmap_enter_quick(). Using the first change, modify vm_map_pmap_enter() so that the page queues lock is acquired and released once, rather than each time that a page is mapped.
* - The IQ80321 has a jumper which changes the PCI device id from 4 to 8 for thecognet2004-12-211-5/+13
| | | | | | | | | GigE controller, so handle this. - Use the outbound window 0 if the PCI mem requested is in its range, instead of inconditionally use the outbound window 1. This should be enough to get FreeBSD/arm to work on the IQ80321 board as well. Reported and tested by: Jia-Shiun Li <jiashiun at gmail dot com>
* Update the StrongArm port to match the current code.cognet2004-12-183-6/+15
| | | | | | - Implement arm_mask_irqs and arm_unmask_irqs - Provide the available physical address range after pmap_bootstrap allocated things, instead or before, or bad things happen.
* Make sure gcc doesn't generate something such as swp r3, r4, [r3] for __swp,cognet2004-12-181-1/+1
| | | | as it has unpredictable results.
* In the common case, pmap_enter_quick() completes without sleeping.alc2004-12-151-0/+11
| | | | | | | | | | | | | | | | | | In such cases, the busying of the page and the unlocking of the containing object by vm_map_pmap_enter() and vm_fault_prefault() is unnecessary overhead. To eliminate this overhead, this change modifies pmap_enter_quick() so that it expects the object to be locked on entry and it assumes the responsibility for busying the page and unlocking the object if it must sleep. Note: alpha, amd64, i386 and ia64 are the only implementations optimized by this change; arm, powerpc, and sparc64 still conservatively busy the page and unlock the object within every pmap_enter_quick() call. Additionally, this change is the first case where we synchronize access to the page's PG_BUSY flag and busy field using the containing object's lock rather than the global page queues lock. (Modifications to the page's PG_BUSY flag and busy field have asserted both locks for several weeks, enabling an incremental transition.)
* Enable interrupts once the active ones have been masked.cognet2004-12-141-3/+2
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* Update the sp after popping the regs.cognet2004-12-141-1/+1
| | | | This is a good candidate for the golden pointy hat awards.
* Save a few more cycles in cpu_switch() and cpu_throw().cognet2004-12-121-29/+24
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* Fix style.cognet2004-12-111-34/+34
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* Add entries to trace syscalls with KTR.cognet2004-12-111-0/+6
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* Fix compilation with INVARIANTS.cognet2004-12-111-2/+2
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* s/RETEQ/RETeq/.cognet2004-12-101-1/+1
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* Include <sys/signalvar.h> for trapsignal().cognet2004-12-071-0/+1
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* Make sure to map the whole kernel into 1MB pages. Try to use the remainingcognet2004-12-051-27/+67
| | | | memory for things such as the kernel stack.
* Reactivate the use of the minidata cache.cognet2004-12-051-1/+0
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* Do not change the page directory and do not flush the TLB when switching tocognet2004-12-051-26/+6
| | | | a kernel thread.
* Remove an unused field from the struct pv_entry.cognet2004-12-051-4/+3
| | | | While I'm there, fix style.
* Include <sys/signalvar.h> for trapsignal().cognet2004-12-021-0/+1
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* Don't include sys/user.h merely for its side-effect of recursivelydas2004-11-274-4/+2
| | | | including other headers.
* Enable interrupts as soon as the pending interrupts have been masked.cognet2004-11-231-4/+3
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* Use ns8250.cognet2004-11-232-3/+2
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* Cleanup.cognet2004-11-211-41/+3
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* Set the frame pointer to 0 in fork_trampoline().cognet2004-11-211-0/+1
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* Implement breakpoints and single stepping on arm.cognet2004-11-214-21/+109
| | | | Obtained from: NetBSD
* Remove useless code.cognet2004-11-201-120/+0
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* Implement enough to be able to enter and leave DDB.cognet2004-11-203-5/+43
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* Get the kernel stack right now that the u-area is gone.cognet2004-11-204-6/+7
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* Remove UAREA_PAGES and USPACE definitions. The definitions ofdas2004-11-201-9/+1
| | | | | | | | USPACE_SVC_STACK_TOP, USPACE_SVC_STACK_BOTTOM, USPACE_UNDEF_STACK_TOP, and USPACE_UNDEF_STACK_BOTTOM look wrong to me, so I'm leaving them alone. Reviewed by: arch@
* Remove some references to U area here while trying not to breakdas2004-11-201-4/+3
| | | | | | | anything. Someone with ARM hardware could do a lot more to untangle this code. Reviewed by: arch@
* Remove references to U area and garbage collect includes.das2004-11-201-3/+1
| | | | Reviewed by: arch@
* U areas are going away, so don't allocate one for process 0.das2004-11-202-17/+1
| | | | Reviewed by: arch@
* Increase cnt.v_syscall and cnt.v_trap when needed.cognet2004-11-201-0/+3
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* Move KERNPHYSADDR and KERNVIRTADDR from std.i80321 to std.iq31244.cognet2004-11-182-2/+2
| | | | Use the correct KERNPHYSADDR.
* Simplify a bit bus_dmamap_load_buffer by removing the "first" parameter, usecognet2004-11-161-38/+21
| | | | | | nseg == -1 instead. Obtained from: NetBSD
* MFi386:cognet2004-11-151-17/+14
| | | | | - inlina bus_dmamap_load_buffer - Directly pass the pmap to bus_dmamap_load_buffer, instead of the struct thread
* Remove debugging printf.cognet2004-11-131-1/+0
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* Don't forget to clear the PG_WRITEABLE flag when appropriate.cognet2004-11-131-0/+6
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* Use uma_prealloc() on the l2table_zone to prevent a LOR at startup.cognet2004-11-131-3/+5
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* Implement interrupt counting, so that vmstat -i work.cognet2004-11-123-9/+21
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* Don't forget to include opt_vm.h.cognet2004-11-101-0/+2
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* Convert the IQ31244 code to use ARM32_NEW_VM_LAYOUT.cognet2004-11-102-6/+16
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* Invalidate the data cache in pmap_qremove() instead of in pmap_kenter(),cognet2004-11-101-2/+2
| | | | and in pmap_enter_quick() instead of pmap_enter().
* Remove __P here too.trhodes2004-11-101-3/+3
| | | | Ok'ed by: cognet
* Use the RET macro.cognet2004-11-0925-296/+295
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* Import a RET macro, that will use bx if the arch supports it.cognet2004-11-091-0/+36
| | | | Obtained from: NetBSD
* Introduce two new options, "CPU private" and "no wait", to sf_buf_alloc().alc2004-11-081-3/+5
| | | | | | Change the spelling of the "catch" option to be consistent with the new options. Implement the "no wait" option. An implementation of the "CPU private" for i386 will be committed at a later date.
* Add device mem in config files.cognet2004-11-072-0/+2
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* Import md bits for mem(4) on arm.cognet2004-11-074-45/+202
| | | | While I'm there, cleanup a bit pmap.h.
* Remove useless code.cognet2004-11-071-14/+0
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