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* Implement pmap_clear_write().alc2006-07-201-0/+15
* Fix ALT_BREAK_TO_DEBUGGER on the AT91 :cognet2006-07-201-5/+20
* Make sure we use REDUCE32 on the result of do_cksum(), as in_cksum_skip()cognet2006-07-181-2/+13
* If we can't defrag a packet, re-queue it instead of dropping it.cognet2006-07-171-1/+1
* #if => #ifdefcognet2006-07-171-2/+2
* at91_spi won't compile without spibus, so add it.cognet2006-07-171-0/+1
* Oops bring back code that shouldn't have been removed by the previouscognet2006-07-151-0/+2
* Make sure that if uma_small_alloc() gets called recursively, we just give upcognet2006-07-151-7/+6
* Add a comment explaining why the OHCI mapping has been commented out.cognet2006-07-151-0/+9
* MFp4: this now depends on new spi bus stuffimp2006-07-141-1/+3
* MFp4: tweaksimp2006-07-141-7/+8
* MFp4: elevate quality of slow clock a littleimp2006-07-141-1/+1
* MFp4: paren policeimp2006-07-141-6/+4
* MFp4:imp2006-07-143-8/+66
* MFp4:imp2006-07-141-1/+1
* The TSC board uses a 16MHz base clock for the AT91RM9200, while the Kwikbyteimp2006-07-141-0/+6
* Implement the set_time function. Rather pointless with this RTC, as itimp2006-07-141-3/+8
* MF p4:imp2006-07-143-319/+134
* Be sure to flush the cache after a partial read on timeout. Expandimp2006-07-141-3/+7
* Move some of the common parameters into the std. files for this platform.imp2006-07-143-11/+16
* Remove prototype for the undefined function counterhandler().cognet2006-07-141-1/+0
* Add remote GDB bits for arm.cognet2006-07-142-0/+155
* Simplify the pager support in DDB. Allowing different db commands tojhb2006-07-121-4/+2
* Comment out the mapping of the OHCI controller registers va == pa. Thiscognet2006-07-121-0/+2
* Add a new flag to pmap_enter_locked() to say if it's OK to wait. If it is, andcognet2006-07-111-10/+22
* Add support for configuring pins to be one of {GPIO, PERIPHERAL A orimp2006-07-023-1/+450
* MFp4:imp2006-07-021-53/+208
* Backout previous commit, Warner committed at91_pio.c...cognet2006-06-231-1/+1
* There's no need to allocate that much phdr/shdr from the stack.cognet2006-06-231-2/+2
* Add the arm9_setup() prototype.cognet2006-06-231-0/+2
* Comment out at91_pio.c, it's not in CVS.cognet2006-06-231-1/+1
* arm9_setup() is now needed even if we're not using a gzipped kernel, so movecognet2006-06-221-1/+1
* Nitsville: the routine is called initarm, not init_arm, correct it inimp2006-06-211-1/+1
* Don't forget to define uart_sa1110_vaddr.cognet2006-06-211-0/+2
* Compute physmem so we can print it correctly on boot.imp2006-06-201-5/+5
* Probe the memory size of the board better. Look at the bus width,imp2006-06-202-2/+60
* Make sure the stack is properly aligned.cognet2006-06-181-10/+32
* comment out twi for now: no iicbus in KB920X: it breaks bootingimp2006-06-171-1/+1
* Carefully note the RMII bit in the config register at attach time.imp2006-06-171-5/+9
* improve reporting of clocksimp2006-06-171-3/+2
* Remove COMPAT_43 from GENERIC (and other kernel configs). For amd64 there'snetchild2006-06-154-4/+0
* Remove mpte optimization from pmap_enter_quick().ups2006-06-151-4/+2
* MFp4:cognet2006-06-122-10/+139
* MFp4: Increase the L1 pagetable needed for the kernel from 8 to 22, to becognet2006-06-121-1/+1
* Remove pmap_pagedaemon_waken and update pmap_get_pv_entry() to match thealc2006-06-111-6/+2
* Eliminate spl calls.alc2006-06-111-11/+0
* Add a lock assertion. Remove dead (locking) code. Change some whitealc2006-06-101-36/+4
* Add pmap locking to pmap_extract().alc2006-06-091-4/+8
* Oops it seems I forgot to remove ARM32_NEW_VM_LAYOUT from here.cognet2006-06-073-3/+0
* Add pmap locking to pmap_fault_fixup().alc2006-06-071-16/+7
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