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* Add AT_STACKPROT elf aux vector. Will be used to inform rtld about thekib2011-01-071-1/+2
* Remove bogus usage of INTR_FAST. "Fast" interrupts are now indicated byjhb2011-01-061-1/+1
* - Add a proper return value to mv_gpio_intr().jhb2011-01-061-4/+5
* - Use macbstart_locked() directly instead of deferring it to a task.jhb2011-01-061-16/+14
* Remove support for SKYEYE simulatorimp2011-01-055-52/+0
* Remove ancient simulation code. Skyeye simulation never really workedimp2011-01-052-90/+0
* IXP4XX_GPIO_{,UN}LOCK() don't take args. Remove the sc here to makeimp2010-12-231-10/+10
* Fix double ;;kevlo2010-12-061-1/+1
* Revert r216134. This checkin broke platforms where bus_space are macros:brucec2010-12-031-59/+8
* Disallow passing in a count of zero bytes to the bus_space(9) functions.brucec2010-12-021-8/+59
* Provide a mutex around the read/modify/write of the IXP425_GPIO_*thompsa2010-11-146-45/+35
* Add a GPIO driver for the Gateworks Cambria platform.thompsa2010-11-114-0/+480
* add hint for at45d flash device sitting of spibus0ticso2010-11-111-0/+4
* - Remove <machine/mutex.h>. Most of the headers were empty, and thejhb2010-11-091-32/+0
* Fix typos.brucec2010-11-091-2/+2
* Minor cosmetic changeskevlo2010-11-091-4/+4
* Intel IXP425 SoC is based on the ARMv5TE architecturekevlo2010-11-081-2/+3
* Remove line for the uncommitted Cambria gpio drive that snuck in with r214946.thompsa2010-11-071-1/+0
* Hook up the five gpio pins on the Avila board to the gpio framework. There arethompsa2010-11-075-0/+391
* Adjust the order of operations in spinlock_enter() and spinlock_exit() tojhb2010-11-051-4/+10
* Try to be a little smart at guessing where _start is located in flash, insteadcognet2010-11-011-2/+4
* Set of legacy mode SATA enchancements:mav2010-10-181-1/+1
* Remove a device_printf() accidentally left in r213894.marius2010-10-151-1/+0
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-152-6/+8
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-152-19/+14
* Add the QILA9G20 config files.cognet2010-10-062-0/+162
* Add support for the AT91SAM9260cognet2010-10-0614-65/+826
* Add the AT91SAM9G20EK config files.cognet2010-10-062-0/+163
* if_ate.c:cognet2010-10-0640-2519/+3091
* fix outdated commentticso2010-09-281-4/+1
* The TWI controller automatically stops if we don't fill up with new data inticso2010-09-271-3/+1
* fix off by one error for twi reads with len != 1.ticso2010-09-271-1/+1
* Add basic cpu_sleep() support for Marvell SoCs. This drops my SheevaPlug'smav2010-09-183-1/+12
* Clear timer interrupt status before calling callback, not after it,mav2010-09-181-4/+6
* In pmap_remove_all(), do not decrease pm_stats.wired_count if the mapping wascognet2010-09-121-2/+0
* bus_add_child: change type of order parameter to u_intavg2010-09-102-3/+3
* Add custom kernel configuration and device tree source files foremax2010-09-081-0/+76
* Supply some useful information to the started image using ELF aux vectors.kib2010-08-171-2/+8
* Update various places that store or manipulate CPU masks to use cpumask_tjhb2010-08-111-1/+1
* Very rough first cut at NUMA support for the physical page allocator. Forjhb2010-07-271-0/+7
* Allow external interrupts.andrew2010-07-242-7/+163
* Add the s3c24x0 real time clock driverandrew2010-07-224-1/+194
* Rework how device memory is allocated on the s3c24x0 CPU's.andrew2010-07-225-81/+67
* Fix several un-/signedness bugs of r210290 and r210293. Add one more check.mav2010-07-201-3/+3
* Refactor Marvell ARM SoC timer driver to the new timer infrastructure.mav2010-07-202-42/+81
* Now that we are fully FDT-driven on MRVL platforms, remove PHYSMEM_SIZE option.raj2010-07-195-33/+3
* Eliminate FDT_IMMR_VA define.raj2010-07-192-10/+2
* Move MRVL FDT fixups and PIC decode routine to a platform specific area.raj2010-07-191-0/+42
* Import preliminary support for Atmel AT91SAM9G20 cpu, and the Hot-e HL201.cognet2010-07-1418-3/+4193
* Get rid of bootinfo for good in loader (U-Boot-based) and ARM.raj2010-07-112-78/+0
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