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* MFC r258787:eadler2014-02-041-1/+1
| | | | r258780 should not have applied to .S files.
* MFC r258779,r258780,r258787,r258822:eadler2014-02-0416-23/+23
| | | | | | | | | | | | | Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this shifts into the sign bit. Instead use (1U << 31) which gets the expected result. Similar to the (1 << 31) case it is not defined to do (2 << 30). This fix is not ideal as it assumes a 32 bit int, but does fix the issue for most cases. A similar change was made in OpenBSD.
* MFC r256959:loos2014-01-235-0/+626
| | | | | | | | | | | | | | | | | | | | | | | Add the Raspberry Pi BSC (I2C compliant) controller driver. Reviewed by: rpaulo MFC r256961: Enable the build of OFW I2C bus for FDT systems. MFC r258045: As all the IIC controllers on system uses the same 'iichb' prefix we cannot rely only on checking the device unit to indentify the BSC unit we are attaching to. Make use of the device base address to identify our BSC unit. MFC r259127: Bring the RPi I2C driver in line with ti_i2c. Make it treat any slave address as a 7-bit address. Approved by: adrian (mentor)
* MFC r257127:loos2014-01-233-8/+0
| | | | | | | Remove all the instances of '#undef DEBUG' from kernel. Suggested by: rpaulo Approved by: adrian (mentor)
* Revert r252694 from stable/10 to fix instabilities seen with jemalloc + ↵adrian2013-12-271-7/+2
| | | | | | | | | dhclient/sshd. This is a direct commit to stable/10 as the VM code has changed since the stable/10 branch. PR: kern/185046
* MFC 258177:jhb2013-12-242-6/+0
| | | | | Remove an incorrectly copied and pasted clause from these license statements.
* MFC r259685:imp2013-12-231-0/+16
| | | | | | | | | | | | | | | | | | Plumb the cn_grab and cn_ungrab routines down into the uart clients. Mask RX interrupts while grabbed on the atmel serial driver. This UART interrupts every character. When interrupts are enabled at the mountroot> prompt, this means the ISR eats the characters. Rather than try to create a cooperative buffering system for the low level kernel console, instead just mask out the ISR. For NS8250 and decsendents this isn't needed, since interrupts only happen after 14 or more characters (depending on the fifo settings). Plumb such that these are optional so there's no change in behavior for all the other UART clients. ddb worked on this platform because all interrupts were disabled while it was running, so this problem wasn't noticed. The mountroot> issue has been around for a very very long time. Approved by: re@ (gjb@)
* MFC r257228:kib2013-12-172-0/+21
| | | | | Add bus_dmamap_load_ma() function to load map with the array of vm_pages.
* MFC r259212, r259220:ian2013-12-141-14/+23
| | | | | | | | | | | Fix one race and one fence post error. When the TX buffer was completely full, we'd not complete any of the mbufs due to the fence post error (this creates a large leak). When this is fixed, we still leak, but at a much smaller rate due to a race between ateintr and atestart_locked as well as an asymmetry where atestart_locked is called from elsewhere. Ensure that we free in-flight packets that have completed there as well. Also remove needless check for NULL on mb, checked earlier in the loop and simplify a redundant if.
* MFC r259038, r259039:ian2013-12-141-1/+2
| | | | | | | | | | | | | | | Bump the maximum VM space from 3 * memory size to a fixed 256MB. That's all we have room for since we map the hardware registers starting at 0xd0000000. This allows my 64MB AT91SAM9G20 to boot again after the unmmaped I/O changes were MFC'd at r251897. Other subplatforms may need similar treatment. Although not strictly required to boot a 64MB board, bump vm_max_virtual_address to be KERNVIRTADDR + 256MB. This allows some future shock protection since the KVA requirements have gone up since the unmapped changes have gone in, as well as preventing us from overlapping with the hardware devices, which we map at 0xd0000000, which we'd hit with anything more than 85MB...
* MFC r258828:ian2013-12-141-1/+1
| | | | | Add a nand flash controller driver for Atmel at91 family. Tested only on at91rm9200 so far.
* MFC r258820: Add definitions for the PIO pins found on recent AT91 SoCs.ian2013-12-141-0/+64
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* MFC r258392, r258412:ian2013-12-1410-1/+19
| | | | | | | | | | | | Call cpu_setup() immediately after the page tables are installed. This enables data cache and other chip-specific features. It was previously done via an early SYSINIT, but it was being done after pmap and vm setup, and those setups need to use mutexes. On some modern ARM platforms, the ldrex/strex instructions that implement mutexes require the data cache to be enabled. Call cpu_setup() from the initarm() routine on platforms that don't use the common FDT-aware initarm() in arm/machdep.c.
* MFC r258393:ian2013-12-141-0/+1
| | | | Add USB_HOST_ALIGN=64; the cache line size on the am335x is 64 bytes.
* MFC r258356:ian2013-12-141-3/+3
| | | | | | Bugfixes... the host capabilties from FDT data are stored in host.caps, not host.host_ocr, examine the correct field when setting up the hardware. Also, the offset for the capabilties register should be 0x140, not 0x240.
* MFC r258240:ian2013-12-141-1/+2
| | | | | In the data abort handler, don't panic if kdb is available and says it handled the condition.
* MFC r257924:ian2013-12-141-4/+4
| | | | | Apparently with "const uint32_t foo = 0x60;" gcc doesn't consider 'foo' to be a constant integer suitable for use in a case label, so use #defines.
* MFC r257669, r257672, r257673, r257676, r257678:ian2013-12-1419-155/+330
| | | | | | | | | | | | | | | | | | | | | | | | | | Call initarm_lastaddr() later in the init sequence, after establishing static device mappings, rather than as the first of the initializations that a platform can hook into. This allows a platform to allocate KVA from the top of the address space downwards for things like static device mapping, and return the final "last usable address" result after that and other early init work is done. Because some platforms were doing work in initarm_lastaddr() that needs to be done early, add a new initarm_early_init() routine and move the early init code to that routine on those platforms. Make PTE_DEVICE a synonym for PTE_NOCACHE on armv4, to make it easier to share the same code on both architectures. Add new helper routines for arm static device mapping. The new code allocates kva space from the top down for the device mappings and builds entries in an internal table which is automatically used later by arm_devmap_bootstrap(). The platform code just calls the new arm_devmap_add_entry() function as many times as it needs to (up to 32 entries allowed; most platforms use 2 or 3 at most). Remove imx local devmap code and use the essentially identical common code that got moved from imx_machdep.c to arm/devmap.c.
* MFC r257648, r257649, r257660:ian2013-12-1333-351/+384
| | | | | | | | | | | | | | | | | Begin reducing code duplication in arm pmap.c and pmap-v6.c by factoring out common code related to mapping device memory into a new devmap.c file. Remove the growing duplication of code that used pmap_devmap_find_pa() and then did some math with the returned results to generate a virtual address, and likewise in reverse to get a physical address. Now there are a pair of functions, arm_devmap_vtop() and arm_devmap_ptov(), to do that. The bus_space_map() implementations are rewritten in terms of these. Move remaining code and data related to static device mapping into the new devmap.[ch] files. Emphasize the MD nature of these things by using the prefix arm_devmap_ on the function and type names (already a few of these things found their way into MI code, hopefully it will be harder to do by accident in the future).
* MFC r257639:ian2013-12-132-91/+8
| | | | | | | Remove the duplicated implementations of some bus_space functions and use the essentially identical generic implementations instead. The generic implementations differ only in the spelling of a couple variable names and some formatting differences.
* MFC r257603, r257604:ian2013-12-134-3/+3
| | | | | | | | Rename WANDBOARD-COMMON to WANDBOARD.common and adjust the configs that include it accordingly. The build machinery for universe and tinderbox tries to build every kernel config whose name begins and ends with [A-Z0-9] and the common include file that has most of the options isn't buildable by itself, so the new lowercase .common will avoid building it.
* MFC r257595: Comments and style(9) only, no functional changes.ian2013-12-131-16/+15
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* MFC r257561:ian2013-12-131-6/+2
| | | | | Bugfix: the attach routine needs to use the same table of fdt compat strings that the probe routine used.
* MFC r257557: Add a missing register definition.ian2013-12-131-0/+11
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* MFC r257518, r257519:ian2013-12-131-15/+83
| | | | | | | | | | | | | | | | | | TI sdhci driver improvements, mostly related to fdt data... Use the published compatible strings (our own invention, "ti,mmchs" is still accepted as well, for now). Don't blindly turn on 8-bit bus mode, because even though the controller supports it, the board has to be wired appropriately as well. Use the published property (bus-width=<n>) and honor all the valid values (1,4,8). The eMMC device on a Beaglebone Black is wired for 8-bit, update the dts. The mmchs controller can inherently do both 1.8v and 3.0v on the first device and 1.8v only on other devices, unless an external transceiver is used. Set the voltage automatically for the first device and honor the published fdt property (ti,dualvolt) for other devices.
* MFC r257483, r257486, r257489:ian2013-12-138-0/+569
| | | | | | Add the Soc- / machine-dependent parts of imx6 support. Add dts source for imx6 SoCs and for Wandboard boards. Add kernel config for Wandboard.
* MFC r257476, r257478:ian2013-12-132-13/+18
| | | | | | | Revamp the SoC identity numbering scheme to be more in line with the way Freescale numbers the chips in the ID registers. Add definitions for the register and data that describes the SoC type.
* MFC r257454: Add sdhci driver glue for imx family SoCs.ian2013-12-131-0/+704
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* MFC r257453: Add stubbed-out imx6 support for clocks and power management.ian2013-12-135-0/+592
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* MFC r257452: Add support for the USB PHY on imx6 SoCs.ian2013-12-131-0/+189
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* MFC r257419:ian2013-12-131-2/+2
| | | | | Do not EOI an interrupt until the point after the filter handlers / before threaded handlers.
* MFC r257418:ian2013-12-131-1/+1
| | | | | Don't iterate through the bits of the pending interrupt register if the whole register is zero. Most of the registers will be zero most of the time.
* MFC r257413:ian2013-12-131-16/+15
| | | | | | | | | | | | Reset the timer interrupt status register at the top rather than bottom of the interrupt handler. If the event callback starts a new short timeout, the timer can fire before returning from the event callback, and clearing the interrupt status after that loses the interrupt and hangs until the counter wraps. Fixing all of this removes the need for the do-nothing loop at the top of the handler which really just waited for the counter to roll over and reach the one-shot count again. Also add a missing return(0) in the periodic timer start case.
* MFC r257407:ian2013-12-131-10/+17
| | | | | | Expand the list of compatible devices this driver works with. Increase the target frequency from 1 to 10 MHz because these SoCs are plenty fast enough to benefit from the extra event timer resolution.
* MFC r257383, r257384:ian2013-12-136-2/+222
| | | | | | Add some bare-bones support for enabling usb and usbphy clocks. Add a "no-op" USB PHY driver for imx-family SoCs.
* MFC r257258, r257265: Include headers (if_var.h and others) where needed.ian2013-12-137-6/+13
| | | | | | The change that triggered the need for this on head was r257244. That hasn't been MFC'd yet, but there's no harm in paving the way for it with this MFC.
* MFC r257203: Eliminate a compiler warning about extraneous parens.ian2013-12-131-2/+2
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* MFC r257201, r257202ian2013-12-1315-119/+19
| | | | Retire arm_remap_nocache() and the data and constants associated with it.
* MFC r257199, r257200, r257217:ian2013-12-1380-106/+39
| | | | | | | | | | | | | | | Remove all #include <machine/pmap.h> from arm code. It's already included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h so there's no reason to ever include it directly. Remove #include <machine/frame.h> from all the arm code that doesn't really need it. That would be almost everywhere it was included. Add it in a couple files that really do need it and were previously getting it by accident via another header. Remove the last dregs of trapframe_t. It turns out only arm was using this type, so remove it to make arm code more consistant with other platforms.
* MFC r257062: Add the Raspberry Pi SPI controller driver.ian2013-12-135-0/+673
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* MFC r256949: Import basic support for Rockchip RK3188 SoC.ian2013-12-1310-0/+1336
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* MFC r257197:ian2013-12-136-192/+312
| | | | | | | Maximize available kva space by doing static device mapping from the top of the address space downwards, and then returning the lowest mapped device address from initarm_lastaddr(). Premap most of the device's on-chip peripherals.
* MFC r256809: Add configuration for the Freescale i.MX53 Quick Start Board.ian2013-12-131-0/+179
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* MFC r256806, r256919, r257167:ian2013-12-131-0/+3
| | | | | | | | | | | | | Add a driver for the Freescale Fast Ethernet Controller found on various Freescale SoCs including the i.MX series. This also works for the newer SoCs with the ENET gigabit controller, but doesn't use any of the new hardware features other than enabling gigabit speed. Mask out non-address bits in the mac address register, for proper detection of an all-zeroes address. Also remove a misplaced return. Switch to using ofw_bus_search_compatible() table-driven compat lookup. Add compat strings for Freescale Vybrid family SoCs.
* MFC r256804:ian2013-12-131-5/+5
| | | | | Switch to using the standard uart console driver instead of the special driver for early boot debugging.
* MFC r256774:ian2013-12-131-2/+2
| | | | Clock divisors 0-3 correspond to dividing by 1-4, so add 1 before dividing.
* MFC r256647:ian2013-12-131-0/+6
| | | | | Invalidate the entire L2 cache before enabling it. Say whether it has been enabled or disabled.
* MFC r256638:ian2013-12-131-0/+5
| | | | | | | Add cases for the combinations of busdma sync op flags that we handle correctly by doing nothing, then add a panic for the default case, because that implies that some driver asked for a sync (probably incorrectly) and nothing was done.
* MFC r256637:ian2013-12-131-10/+19
| | | | | | When calculating the number of bounce pages needed, round the maxsize up to a multiple of PAGE_SIZE, and add one page because there can always be one more boundary crossing than the number of pages in the transfer.
* MFC r256628:ian2013-12-131-1/+1
| | | | | | Fix a register name typo. The effect was that CPU_CONTROL_AFLT_ENABLE wasn't being set, but it was almost assuredly already turned on anyway by the bootloader.
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