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* Fix a typo.jhb2005-06-231-1/+1
| | | | Approved by: re (scottl)
* Remove the va == pa mapping.cognet2005-06-231-10/+7
| | | | Approved by: re (blanket)
* Call kdb_trap() on fatal abort.cognet2005-06-231-5/+5
| | | | Approved by: re (blanket)
* Implement db_frame() and use it to obtain the registers value.cognet2005-06-231-22/+45
| | | | Approved by: re (blanket)
* Don't abuse UMA_SLAB_KMEM.cognet2005-06-232-9/+4
| | | | Approved by: re (blanket)
* Add .cvsignore files just like in sys/<arch>/compiled, this keeps CVS fromobrien2005-06-201-0/+1
| | | | | | questing kernel config files not in CVS. Approved by: re(kensmith)
* Try harder to detect if the allocated memory for L2 PTP comes from a 1MBcognet2005-06-161-1/+5
| | | | | | section or not. Approved by: re (blanket)
* Don't pass the kernel_pmap to pmap_fault_fixup() if the fault comes fromcognet2005-06-161-2/+2
| | | | | | | | kernel mode, always use the curthread pmap instead. There are valid cases were we can fault on a user address from the kernel without pcb_onfault being set. Approved by: re (blanket)
* Remove the last use of pmap_initialized.cognet2005-06-101-4/+1
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* Introduce a procedure, pmap_page_init(), that initializes thealc2005-06-101-17/+12
| | | | | | | | | | | | | | | | | | | vm_page's machine-dependent fields. Use this function in vm_pageq_add_new_page() so that the vm_page's machine-dependent and machine-independent fields are initialized at the same time. Remove code from pmap_init() for initializing the vm_page's machine-dependent fields. Remove stale comments from pmap_init(). Eliminate the Boolean variable pmap_initialized from the alpha, amd64, i386, and ia64 pmap implementations. Its use is no longer required because of the above changes and earlier changes that result in physical memory that is being mapped at initialization time being mapped without pv entries. Tested by: cognet, kensmith, marcel
* MFP4:jkoshy2005-06-091-0/+14
| | | | | | | | | | | | | | | | - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
* Use tabs, not spaces.cognet2005-06-091-6/+6
| | | | Reported by: ru
* Add ata stuff.cognet2005-06-091-1/+10
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* - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32cognet2005-06-097-68/+73
| | | | | interrupts. - Implement teardown methods where appropriate.
* Add a new arm-specific option, ARM_USE_SMALL_ALLOC. If defined, it providescognet2005-06-076-68/+280
| | | | | an implementation of uma_small_alloc() which tries to preallocate memory 1MB per 1MB, and maps it into a section mapping.
* Bring in bits I forgot while importing write back support for arm9.cognet2005-06-031-11/+13
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* Remove a useless printf.cognet2005-06-031-1/+0
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* Create nexus in configure_first() instead of in configure(). Thismarcel2005-05-291-2/+3
| | | | | makes sure that sysinit tasks that run after configure_first(), but before configure() have a nexus to hang devices off.
* Call cninit_finish() and set cold to 0 in configure_final() insteadmarcel2005-05-291-3/+3
| | | | | of in configure(). Call cninit_finish() before setting cold to 0. This is how it's done for other platforms. Be alike to avoid problems.
* Remove bus_{mem,p}io.h and related code for a micro-optimization on i386nyan2005-05-292-66/+0
| | | | | | and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
* Remove pmap_deactivate(), we do not use it.cognet2005-05-271-6/+0
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* s/_KLD_MODULE/KLD_MODULE/cognet2005-05-261-1/+1
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* Don't enable interrupts in the dispatcher, there's no need to do so.cognet2005-05-261-2/+1
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* Don't call vm_page_dirty() in pmap_nuke_pv(), it's not the place to do so, andcognet2005-05-261-2/+1
| | | | it leads to funny things, such as pmap_remove_all() marking the page as dirty.
* Remove bits specific to CPUs we won't support (< armv4).cognet2005-05-255-538/+15
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* Increase the refresh rate.cognet2005-05-251-1/+1
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* MFp4: Setup arm9 to write back by default.cognet2005-05-241-13/+17
| | | | Obtained from: NetBSD
* Remove kcopy(), we don't use it.cognet2005-05-242-630/+0
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* We need to decrease p->p_lock after vm_fault() has been called.cognet2005-05-241-1/+1
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* Correctly setup the UND stack in cpu_set_upcall(), and the trapframe incognet2005-05-241-4/+5
| | | | cpu_thread_setup(), as done in cpu_fork().
* - Try to avoid calling malloc() in bus_dmamap_create() and bus_dmamem_alloc()cognet2005-05-241-17/+65
| | | | | | for the dmamap by using static dmamaps. - Don't do anything for BUS_DMASYNC_PREREAD and BUS_DMASYNC_POSTWRITE in bus_dmamap_sync(), it's not needed anymore.
* Write back affected pages in pmap_qremove() as well. This removes the needcognet2005-05-242-6/+12
| | | | | | to change the DACR when switching to a kernel thread, thus making userland thread => kernel thread => same userland thread switch cheaper by totally avoiding data cache and TLB invalidation.
* Use a more sane value for HZ.cognet2005-05-241-2/+3
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* Use asm versions of in_cksum() and friends.cognet2005-05-243-245/+18
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* Asm version of bswap16().cognet2005-05-241-5/+6
| | | | Obtained from: NetBSD
* Make sure we clean the RAS start address once we're done.cognet2005-05-241-0/+12
| | | | This fixes the random segfaults which occurs at high interrupts rate.
* Don't forget to copy the TP when forking, or bad things will happen to thecognet2005-05-111-0/+1
| | | | child process if it tries to use threads.
* Allocating the memory for the kernel stack one time is enough.cognet2005-04-271-7/+0
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* Don't use fusufault in casuptr(), as it assumes the current PCB will becognet2005-04-231-23/+18
| | | | | stored in r2, which can't be easily done with casuptr(). Introduce casuptrfault instead.
* Change cpu_set_kse_upcall to more generic style, so we can reuse itdavidxu2005-04-231-4/+19
| | | | | | | in other codes. Add cpu_set_user_tls, use it to tweak user register and setup user TLS. I ever wanted to merge it into cpu_set_kse_upcall, but since cpu_set_kse_upcall is also used by M:N threads which may not need this feature, so I wrote a separated cpu_set_user_tls.
* Add empty header (except of the multiple-inclusion protection) tomarcel2005-04-201-0/+10
| | | | get hwpmc(4) to compile on this platform.
* Break out the definition of bus_space_{tag,handle}_t and a few other typesimp2005-04-182-11/+47
| | | | | | | | | | into _bus.h to help with name space polution from including all of bus.h. In a few days, I'll commit changes to the MI code to take advantage of thse sepration (after I've made sure that these changes don't break anything in the main tree, I've tested in my trees, but you never know...). Suggested by: bde (in 2002 or 2003 I think) Reviewed in principle by: jhb
* Unbreak the vector_page == 0x00000000 case. Map the vector page L1PT into thecognet2005-04-141-2/+4
| | | | | kernel domain for each pmap, as we don't update the page table when we're switching to a kernel thread, but we do however update the DACR.
* pmap_update() is gone.cognet2005-04-131-1/+0
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* Use PCPU_LAZY_INC() for cnt.v_{intr,trap,syscalls} rather than atomicjhb2005-04-122-4/+4
| | | | operations in some places and simple non-per CPU math in others.
* We have an asm version of bcmp(), so we could use it as well.cognet2005-04-121-1/+1
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* Don't announce the range SDRAM_START-freemempos until I figure out what'scognet2005-04-071-5/+5
| | | | going on, it produces random memory corruption.
* pmap_update() is gone.cognet2005-04-071-1/+0
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* Import a basic implementation of the restartable atomic sequences to providecognet2005-04-072-38/+148
| | | | | atomic operations to userland (this is OK for UP only, but SMP is still so far away).
* - Try harder to report dirty page.cognet2005-04-072-54/+106
| | | | - Garbage-collect pmap_update(), it became quite useless.
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