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* Modify pmap_enter_quick() so that it expects the page queues to be lockedalc2004-12-231-3/+0
* - The IQ80321 has a jumper which changes the PCI device id from 4 to 8 for thecognet2004-12-211-5/+13
* Update the StrongArm port to match the current code.cognet2004-12-183-6/+15
* Make sure gcc doesn't generate something such as swp r3, r4, [r3] for __swp,cognet2004-12-181-1/+1
* In the common case, pmap_enter_quick() completes without sleeping.alc2004-12-151-0/+11
* Enable interrupts once the active ones have been masked.cognet2004-12-141-3/+2
* Update the sp after popping the regs.cognet2004-12-141-1/+1
* Save a few more cycles in cpu_switch() and cpu_throw().cognet2004-12-121-29/+24
* Fix style.cognet2004-12-111-34/+34
* Add entries to trace syscalls with KTR.cognet2004-12-111-0/+6
* Fix compilation with INVARIANTS.cognet2004-12-111-2/+2
* s/RETEQ/RETeq/.cognet2004-12-101-1/+1
* Include <sys/signalvar.h> for trapsignal().cognet2004-12-071-0/+1
* Make sure to map the whole kernel into 1MB pages. Try to use the remainingcognet2004-12-051-27/+67
* Reactivate the use of the minidata cache.cognet2004-12-051-1/+0
* Do not change the page directory and do not flush the TLB when switching tocognet2004-12-051-26/+6
* Remove an unused field from the struct pv_entry.cognet2004-12-051-4/+3
* Include <sys/signalvar.h> for trapsignal().cognet2004-12-021-0/+1
* Don't include sys/user.h merely for its side-effect of recursivelydas2004-11-274-4/+2
* Enable interrupts as soon as the pending interrupts have been masked.cognet2004-11-231-4/+3
* Use ns8250.cognet2004-11-232-3/+2
* Cleanup.cognet2004-11-211-41/+3
* Set the frame pointer to 0 in fork_trampoline().cognet2004-11-211-0/+1
* Implement breakpoints and single stepping on arm.cognet2004-11-214-21/+109
* Remove useless code.cognet2004-11-201-120/+0
* Implement enough to be able to enter and leave DDB.cognet2004-11-203-5/+43
* Get the kernel stack right now that the u-area is gone.cognet2004-11-204-6/+7
* Remove UAREA_PAGES and USPACE definitions. The definitions ofdas2004-11-201-9/+1
* Remove some references to U area here while trying not to breakdas2004-11-201-4/+3
* Remove references to U area and garbage collect includes.das2004-11-201-3/+1
* U areas are going away, so don't allocate one for process 0.das2004-11-202-17/+1
* Increase cnt.v_syscall and cnt.v_trap when needed.cognet2004-11-201-0/+3
* Move KERNPHYSADDR and KERNVIRTADDR from std.i80321 to std.iq31244.cognet2004-11-182-2/+2
* Simplify a bit bus_dmamap_load_buffer by removing the "first" parameter, usecognet2004-11-161-38/+21
* MFi386:cognet2004-11-151-17/+14
* Remove debugging printf.cognet2004-11-131-1/+0
* Don't forget to clear the PG_WRITEABLE flag when appropriate.cognet2004-11-131-0/+6
* Use uma_prealloc() on the l2table_zone to prevent a LOR at startup.cognet2004-11-131-3/+5
* Implement interrupt counting, so that vmstat -i work.cognet2004-11-123-9/+21
* Don't forget to include opt_vm.h.cognet2004-11-101-0/+2
* Convert the IQ31244 code to use ARM32_NEW_VM_LAYOUT.cognet2004-11-102-6/+16
* Invalidate the data cache in pmap_qremove() instead of in pmap_kenter(),cognet2004-11-101-2/+2
* Remove __P here too.trhodes2004-11-101-3/+3
* Use the RET macro.cognet2004-11-0925-296/+295
* Import a RET macro, that will use bx if the arch supports it.cognet2004-11-091-0/+36
* Introduce two new options, "CPU private" and "no wait", to sf_buf_alloc().alc2004-11-081-3/+5
* Add device mem in config files.cognet2004-11-072-0/+2
* Import md bits for mem(4) on arm.cognet2004-11-074-45/+202
* Remove useless code.cognet2004-11-071-14/+0
* Disable interrupts for atomic_cmpset_32, this one is just not atomic.cognet2004-11-051-10/+13
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