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* MFC:ganbold2015-01-131-1/+1
| | | | | | Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1. Approved by: stas (mentor)
* MFC r276249:loos2015-01-091-9/+18
| | | | | | | | | | | | | | | | Fix the musb initialization sequence on AM335x. According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the USB reset pulse has an undocumented duration of 200ns and during this period the module must not be acessed. We wait for 100us to take into account for some imprecision of the early DELAY() loop. This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at boot while resetting the musb subsystem. While here, enable the USB subsystem clock before the first access.
* MFC r273606:loos2015-01-091-5/+14
| | | | | | | | | | | | | | | | | Fix cpsw_detach() to not panic when called from cpsw_attach(). For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY and fails to attach calling cpsw_detach() which end up in a panic. Fix it by doing the proper check before detach the miibus and also fix the leak of few variables. And to actually make it work, ether_ifattach() has to be moved to the end of cpsw_attach() to avoid a race where calling ether_ifdetach() before domain_init() (which will only run later on) would make it crash at INP_INFO_RLOCK() on in_pcbpurgeif0(). Tested on: BBB (am335x)
* MFC r273599:loos2015-01-091-0/+2
| | | | | | | | | | Fix a bug where DMA maps created with bus_dmamap_create() won't increment the map count and without being able to keep track of the current map allocation, bus_dma_tag_destroy() will fail to proceed and will return EBUSY even after all the maps have been correctly destroyed with bus_dmamap_destroy(). Found while testing the detach method of a NIC.
* MFC r276314:loos2015-01-092-41/+16
| | | | | | Convert the BSC (i2c) driver to use the new iicbus_get_frequency(). Tested on: Raspberry pi
* MFC r273610:loos2015-01-092-4/+40
| | | | | | | | | | | | | Add an iicbus_reset() method to bcm2835_bsc. While it is generally not used for kernel devices it is used by i2c(8). This fix the 'error: Device not configured' when i2c(8) tries to reset the controller: # i2c -r Resetting I2C controller on /dev/iic0: error: Device not configured For now use conservative settings for default i2c speeds.
* MFC r273329, r273337 and r274415loos2015-01-091-6/+8
| | | | | | | | | | | | | | | | | | | Add another wakeup() after actually set the bus as free. This fix a race where the threads waiting for the bus would wake up early and still see bus as busy. While here, give a better description to wmesg for the two use cases we have (bus and io waiting). Fix the mtx_sleep() error checking, catch all errors and not only EWOULDBLOCK. Do not print any message at errors. The errors are properly sent to upper layers which should be able to deal with it, including printing the errors when they need to. The error message was quite annoying while scanning the i2c bus.
* MFC r273701, r274556alc2015-01-021-2/+4
| | | | | | | | | | | By the time that pmap_init() runs, vm_phys_segs[] has been initialized. Obtaining the end of memory address from vm_phys_segs[] is a little easier than obtaining it from phys_avail[]. Enable the use of VM_PHYSSEG_SPARSE on amd64 and i386, making it the default on i386 PAE. (The use of VM_PHYSSEG_SPARSE on i386 PAE saves us some precious kernel virtual address space that would have been wasted on unused vm_page structures.)
* MFC r276165, r276166:ian2014-12-271-0/+23
| | | | | | Define the old-school arm arch constants we still use internally based on the somewhat newer constants predefined by the compiler. This will allow userland apps to use various machine/foo.h headers without CPUTYPE defined.
* MFC r276029:ian2014-12-271-1/+1
| | | | | Remove a volatile qualifier on return type that is ignored and results in a -Wreturn-type warning when compiled with gcc.
* MFC r275944, r275946, r275949, r275950:ian2014-12-271-9/+48
| | | | | | | | | | | Add code to set and reset open-drain mode on the bus when requested. When command and data interrupts have been aggregated together, don't do the data-completed processing if a command-error interrupt is also asserted. Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around TI OMAP controllers which will return the reset-in-progress bit as zero if you read the status register too fast after setting the reset bit.
* MFC r275660: Fix the watchdog timeout calculation to prevent wrap.ian2014-12-271-3/+3
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* MFC r274941: The arm PJ4B cpu is armv7 architecture, not v6.ian2014-12-271-2/+2
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* MFC r274641, r274644, r274822, r276049:ian2014-12-272-31/+75
| | | | | | | | | | | Allow i2c bus speed to be configured via hints, FDT data, and sysctl. Implement bus speed setting for OMAP4, AM335x, and imx5/6. Fix the i2c bus speed divisors for TI OMAP4 and AM335x to give the advertised 100, 400, and 1000 KHz speeds. PR: 195009
* MFC r274412, r274413, r274414: Bugfixes for imx5/6 pinctrl driver.ian2014-12-271-3/+21
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* MFC r274538, r274545, r274596, r274602, r274603, r274604, r274605, r274839:ian2014-12-271-34/+100
| | | | | | | | | | | | | | | | | When doing busdma sync ops for BUSDMA_COHERENT memory, there is no need for cache maintenance operations, but ensure that all prior writes have reached memory when doing a PREWRITE sync. Do not do a cache invalidate on a PREREAD sync that is also a PREWRITE sync. Do the cache invalidate sequence from the outermost to innermost, required for correct operation. Correct the sequence of busdma sync ops involved with PRE/POSTREAD syncs. When doing a PREREAD sync of an mbuf-type dma buffer, do a writeback of the first cacheline if the buffer start address is not on a cacheline boundary.
* MFC 275564:andrew2014-12-141-0/+5
| | | | | | | Use the unified syntax when generating assembly for clang. The clang 3.5 integrated assembler only accepts it. Sponsored by: ABT Systems Ltd
* MFC 275378:andrew2014-12-141-3/+9
| | | | | | | Pull in the NetBSD global offset table handling code. Clang 3.5 creates relocations the linker complains about. Obtained from: NetBSD
* Clean up our ARM assembly:andrew2014-12-1413-200/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MFC 275256: Switch to the ARM unified assembly language as the clang integrated as only supports it. Binutils supports it when the ".syntax unified" directive is set. Sponsored by: ABT Systems Ltd MFC 275264: Update _ENTRY to use _EENTRY to reduce the common code. MFC 275321: Remove extra labels, ENTRY_NP already provides them. Sponsored by: ABT Systems Ltd MFC 275322: Correctly a few incorrect uses of ENTRY/EENTRY and END/EEND Sponsored by: ABT Systems Ltd MFC 275416: Fix the name of the coprocessor to include the "p" prefix, the clang integrated assembler expects this. Sponsored by: ABT Systems Ltd MFC 275418: Switch to unified syntax so these can be built with clang 3.5. Sponsored by: ABT Systems Ltd MFC 275519: Add missing END macros to some of the xscale functions. Sponsored by: ABT Systems Ltd MFC 275520: Use the unified syntax in a few more assembly files Sponsored by: ABT Systems Ltd MFC 275521: Set the alignment to 4-bytes after a string as clang 3.5 can switch to thumb mode if this is incorrect. Sponsored by: ABT Systems Ltd MFC 275522: Place the literal pool after a RET otherwise clang 3.5 tries to put it too far away from a ldr psuedo instruction. With this clang will place the literal value here where it's close enough to be loaded. Sponsored by: ABT Systems Ltd MFC 275523: Switch to an armv6k cpu, without this clang 3.5 complains "bx lr" is unsupported as it needs a newer cpu. Sponsored by: ABT Systems Ltd MFC 275524: Switch to a .cpu directive. These will work when clang 3.5 is imported where the .arch directive is a nop. Sponsored by: ABT Systems Ltd
* MFC 275207:andrew2014-12-141-1/+3
| | | | | | | | | | | | | We don't use the hypervisor interrupt, make it optional in the device tree. Submitted by: Julien Grall <julien.grall AT linaro.org> MFC 275208: Some device tree configurations place the generic timer under the root of the tree and not under simplebus. Update the driver to handle this. Submitted by: Julien Grall <julien.grall AT linaro.org>
* MFC r275376:rpaulo2014-12-091-25/+6
| | | | | Allow multiple devices to mmap. It's impossible to prevent this with checks on the open/close functions.
* Merge the fueword(9) and casueword(9). In particular,kib2014-11-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | MFC r273783: Add fueword(9) and casueword(9) functions. MFC note: ia64 is handled like arm, with NO_FUEWORD define. MFC r273784: Replace some calls to fuword() by fueword() with proper error checking. MFC r273785: Convert kern_umtx.c to use fueword() and casueword(). MFC note: the sys__umtx_lock and sys__umtx_unlock syscalls are not converted, they are removed from HEAD, and not used. The do_sem2*() family is not yet merged to stable/10, corresponding chunk will be merged after do_sem2* are committed. MFC r273788 (by jkim): Actually install casuword(9) to fix build. MFC r273911: Add type qualifier volatile to the base (userspace) address argument of fuword(9) and suword(9).
* MFC r273703:ian2014-11-082-4/+1
| | | | Remove the ARM_DEVICE_MULTIPASS option and make its effect be the default.
* MFC r273288:andrew2014-10-291-1/+19
| | | | | | | Allow the armv6 kernel to be build with PHYSADDR undefined. The kernel will now find the virtual to physical mapping for libkvm to use at runtime. This makes PHYSADDR redundant, however keep it around to give everyone a chance to update their libkvm.
* MFC r273284:andrew2014-10-291-2/+27
| | | | | | | | | | Allow libkvm to get the kernel va to pa delta without the need for physaddr. This should allow for a kernel where PHYSADDR and KERNPHYSADDR are both undefined. For now libkvm will use the old method of reading physaddr and kernaddr to allow it to work with old kernels. This could be removed in the future when enough time has passed.
* MFC r269956:andrew2014-10-293-3/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | From https://sourceware.org/ml/newlib/2014/msg00113.html By Richard Earnshaw at ARM > >GCC has for a number of years provides a set of pre-defined macros for >use with determining the ISA and features of the target during >pre-processing. However, the design was always somewhat cumbersome in >that each new architecture revision created a new define and then >removed the previous one. This meant that it was necessary to keep >updating the support code simply to recognise a new architecture being >added. > >The ACLE specification (ARM C Language Extentions) >(http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.set.swdev/index.html) >provides a much more suitable interface and GCC has supported this >since gcc-4.8. > >This patch makes use of the ACLE pre-defines to map to the internal >feature definitions. To support older versions of GCC a compatibility >header is provided that maps the traditional pre-defines onto the new >ACLE ones. Stop using __FreeBSD_ARCH_armv6__ and switch to __ARM_ARCH >= 6 in the couple of places in tree. clang already implements ACLE. Add a define that says we implement version 1.1, even though the implementation isn't quite complete.
* MFC r263710, r273377, r273378, r273423 and r273455:hselasky2014-10-272-4/+4
| | | | | | | - De-vnet hash sizes and hash masks. - Fix multiple issues related to arguments passed to SYSCTL macros. Sponsored by: Mellanox Technologies
* MFC: r266336, r270230 and r273263loos2014-10-272-732/+540
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r266336: Allow us to compile the Ti iic driver for both OMAP4 and AM335x. r270230: Rewrite of ti_i2c based on gonzo's patch, fix the following bugs/problems: . interrupt storm detected on "intr70:"; throttling interrupt source; . Added access serialization on iicbus_transfer(), previously there was no such protection and a new transfer could easily confuse the controller; . Add error checkings (i.e. stop the transfer when a error is detected and do _not_ overwrite the previous error); . On command done interrupt do not assume that the transfer was finished sucessfully as we will receive the command done interrupt even after errors; . Simplify the FIFO handling; . Reset the FIFO between the transfers as the FIFO may contain data from the last (failed) transfer; . Fix the iicbus speed for AM335x, which in turn will make better use of the I2C noise filter (set to one internal clock cycle); . Move the read and write handler to ithread instead of notifying the requesting thread with wakeup(9); . Fix the comments based on OMAP4 TRM. The above changes allows me to read the EDID from my HDMI monitor on BBB with gonzo's patches to support TDA19988 (which does 128 bytes reads) and repeatedly scan the iicbus (with a modified i2c(8)) without lock up the bus. r273263: Fix the chan address for mtx_sleep() on bus wait. Without this fix the threads waiting for the bus would never wake.
* MFC r273590: Accept documented compatible string for PL310 cache controller/ian2014-10-261-2/+7
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* MFC r273561:ian2014-10-261-1/+35
| | | | | Install a temporary workaround to avoid problems in fdt data with linux's workaround for an imx6 chip erratum by using gpio1_6 as an interrupt.
* MFC r273281:rpaulo2014-10-261-1/+5
| | | | Style changes as pointed out by stas@.
* MFC r273353, r273514:ian2014-10-261-1/+26
| | | | | | | Attach the imx6 CCM driver during BUS_PASS_CPU. Unconditionally enable the clocks for all imx6 devices that we have drivers for, or that are required to run the chip (such as busses).
* MFC r273352: Ask for the fastest available clock for the GTP timecounter.ian2014-10-261-1/+1
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* MFC r273283:ian2014-10-261-7/+38
| | | | | | | Attach this driver during BUS_PASS_BUS and move the cpu init code to a bus_new_pass() handler so it doesn't happen until BUS_PASS_CPU. This allows the anatop driver to outbid the generic simplebus driver (which the FDT data describes as compatible).
* MFC r272333: Honor exclusion flags when building the memory lists.ian2014-10-261-0/+6
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* MFC r271906:ian2014-10-261-106/+183
| | | | Make the ARM MPCore Timer driver work with published standard FDT bindings.
* MFC r271595, r271601, r271607, r271630:ian2014-10-264-3/+79
| | | | | | | | | | | | | | | Add compat strings for all the flavors of GIC this driver should support. Also allow the driver to attach to ofwbus as well as simplebus, some FDT data puts the root interrupt controller on the root bus. Add a common routine for parsing FDT data describing an ARM GIC interrupt. Use gic_decode_fdt() rather than a local routine to parse fdt interrupt properties. Move fdt_pic_table and fdt_fixup_table into imx6_machdep.c, which means imx6 doesn't need imx_common.c anymore. The private peripheral interrupts start at offset 16, not 0. Also, use names rather than inline mystery constants for these offsets.
* MFC r271594:ian2014-10-261-3/+3
| | | | Fix an undefined variable that was accidentally not causing an error.
* MFC r271550, r271591:ian2014-10-2611-2036/+291
| | | | | Replace the imx5 and imx6 iomux drivers with a single common driver that uses the new fdt_pinctrl interface.
* MFC r271310:ian2014-10-261-5/+5
| | | | Rename new to newval in inline asm code, to avoid clashes with C++ new.
* MFC r271097, r271100, r271101, r271102, r271124:ian2014-10-2612-91/+1045
| | | | | | | | - Add a basic iomux driver for imx6. - Implement the same public interface in imx51 and imx6 iomux - The iomux driver is no longer optional, remove it from kernel configs. - Implement the imx_iomux_get/set_gpr() interface for imx6. - Stop setting the iomux device status to disabled, now that we have a driver.
* MFC r268973, r268977: Rename i.MX I2C driver file, enable it on imx6.ian2014-10-266-9/+15
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* MFC r268834, r268835:ian2014-10-265-8/+16
| | | | | | | | o Enable GPIO device driver for i.MX6. It was originally written for i.MX5 and compatible with newer chip. o Extend device tree information o style(9) fixes o Rename gpio driver file.
* MFC r271055, r271084, r271094:ian2014-10-265-0/+92
| | | | | | | | | | | | | Add a function to get the frequency of the AHB bus. Another stopgap function until we have full clock support for imx6. The imx5x and imx6 chips have an onboard IOMUX device which also contains a few "general purpose registers" whose values control chip behavior in ways that have nothing to do with IO pin mux control. Define a simple API that other soc-specific code can use to read and write the registers, and provide the imx51 implementation of them. Fix a typo.
* MFC r270955,r270956: make the imx6 octop and anatop drivers early attachers.ian2014-10-262-6/+21
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* MFC r270945:ian2014-10-265-6/+6
| | | | | Rename OF_xref_phandle() to OF_node_from_xref() and add a new function that provides the inverse translation, OF_xref_from_node().
* MFC r270025:ian2014-10-263-7/+547
| | | | Implement the FDT static pinctl/pinmux spec for Atmel.
* MFC r257200, r259121, r261410, r265853:ian2014-10-261-0/+146
| | | | | | | | | | | | - Remove #include <machine/frame.h>. - Add gpio parse routines according to sys/boot/fdt/dts/bindings-gpio.txt. - Follow r261352 by updating all drivers which are children of simplebus to check the status property in their probe routines. - Rename platform_gpio_init to be SoC specific, and make it static as it's only called from this file. This is mostly catching up on some old MFCs that were done before this file existed in the 10 branch.
* MFC r268633, r271046:ian2014-10-254-5/+137
| | | | | | | | | | | | | | | | | | | | | Fixes and enhancements for the if_cgem driver... - miibus fixes as suggested by Yonghyeon Pyun. - enable VLAN MTU support. - fix a few WITNESS complaints in cgem_attach(). - have cgem_attach() properly init the ifnet struct before calling mii_attach() to fix panic when using e1000phy. - fix ethernet address changing. - fix transmit queue overflow handling. - tweak receive queue handling to reduce receive overflows. - bring out MAC statistic counters to sysctls. - add e1000phy to config file. - implement receive hang work-around described in reference guide. - change device name from if_cgem to cgem to be consistent with other interfaces. Fix the Zedboard/Zynq ethernet driver to handle media speed changes so that it can connect to switches at speeds other than 1gb.
* MFC r273261:rpaulo2014-10-251-2/+0
| | | | Remove an unused mutex.
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