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* Fix ThunderX external PEM bus offsetwma2016-02-181-1/+1
| | | | | | | | Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb Differential revision: https://reviews.freebsd.org/D5293
* Remove pd_prot and pd_cache members from struct arm_devmap_entry.skra2016-02-171-3/+1
| | | | | The struct is used for definition of static device mappings which should always have same protection and attributes.
* Allow callers of OF_decode_addr to get the size of the found mapping. Thisandrew2016-02-161-1/+5
| | | | | | | | | | | | | | will allow for code that uses the old fdt_get_range and fdt_regsize functions to find a range, map it, access, then unmap to replace this, up to and including the map, with a call to OF_decode_addr. As this function should only be used in the early boot code the unmap is mostly do document we no longer need the mapping as it's a no-op, at least on arm. Reviewed by: jhibbits Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5258
* Support PEM that is not a PCI endpoint on ThunderXzbb2016-02-164-29/+164
| | | | | | | | | | | Some chip revisions don't have their external PCIe buses behind the internal bridge. Add support for FDT-configurable PEMs but keep ability for PCIe enumeration. Reviewed by: andrew, wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5285
* Only update curthread and curpcb after we have finished using the oldandrew2016-02-121-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | values. If switching from a thread that used floating-point registers to a thread that is still running, but holding the blocked_lock lock we would switch the curthread to the new (running) thread, then call critical_enter. This will non-atomically increment td_critnest, and later call critical_exit to non-atomically decrement this value. This can happen at the same time as the new thread is still running on the old core, also calling these functions. In this case there will be a race between these non-atomic operations. This can be an issue as we could loose one of these operations leading to the value to not return to zero. If, later on, we then hit a data abort we check if the td_critnest is zero. If this check fails we will panic the kernel. This has been observed when running pcmstat on a Cavium ThunderX. The pcm thread will use the blocked_lock lock and there is a high chance userspace will use the floating-point registers. When, later on, pmcstat triggers a data abort we will hit this panic. The fix is to update these values after storing the floating-point state. This means we use the correct curthread while storing the state so it will not be an issue that the changes to td_critnest are non-atomic. Sponsored by: ABT Systems Ltd
* Support interrupts binding in GICv3 and ITSzbb2016-02-113-35/+167
| | | | | | | | | | | | | | - Add MOVI command and routine for the LPI migration - Allow to search for the ITS device descriptor using not only devID but also LPI number. - Bind SPIs in the Distributor - Don't bind its_dev to collection. Keep track of the collection IDs for each LPI. Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5231
* Implement finer locking in ITSzbb2016-02-112-28/+33
| | | | | | | | | | | - Change locks' names to be more suitable - Don't use blocking mutex. Lock only basic operations such as lists or bitmaps modifications. Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5230
* Initially bind all interrupts to the boot CPU when using GICv3zbb2016-02-112-4/+4
| | | | | | | | | | | This should be done by routing all interrupts to CPU0, different assignment will be induced by either interrupts shuffling or bus_bind_intr(). Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5229
* Call pmc_hook() correctly in the ARM64 interrupt handlerzbb2016-02-111-4/+4
| | | | | | | | | | | pmc_hook() was called only in case of the stray interrupt but should rather be called on each interrupt. Move in to the arm_cpu_intr() handler, out of the critical section too. Reviewed by: br Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5161
* Introduce bus_bind_intr method for ARM64zbb2016-02-114-6/+103
| | | | | | | | | | It can be used to bind specific interrupt to a particular CPU. Requires PIC support for interrupts binding. Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5122
* Fix bugs in interrupts allocation on ARM64zbb2016-02-111-29/+36
| | | | | | | | | | | | | | | | | | Separate interrupt descriptors lookup from allocation. It was possible to perform config on non-existing interrupt simply by allocating spurious descriptor. Must lock the interrupt descriptors table lookup to avoid mismatches. This ought to prevent trouble while setting up new interrupt and dispatching existing one. Use spin mutex rather than sleep mutex. This is mainly due to lock in arm_dispatch_intr. This should be eventually changed to a lock-less solution without walking through a linked list on each interrupt. Reviewed by: andrew, wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5121
* Minor clean-ups for ARM64 GICv3 and GIC driverszbb2016-02-114-34/+15
| | | | | | | | | | | | | GICv3: - move ICC_SGI1R_EL1 definitions to armreg.h and use proper system register's names GIC: - remove unused functions Reviewed by: andrew Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5119
* ARM64 disassembler: support for LDR instructionswma2016-02-111-9/+224
| | | | | | | | | | | Implemented disassembly for a whole bunch of various ldr instructions. Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb Differential revision: https://reviews.freebsd.org/D5217
* Revert an arm64 change that sneaked in with r295464.andrew2016-02-101-6/+7
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* Update of the Allwinner drivers to:andrew2016-02-101-7/+6
| | | | | | | | | | | | | * Use the Linux compat string * Use EARLY_DRIVER_MODULE to attach at the right time * Add a generic A10 kernel config file * A20 now use generic_timer * Add two new dts files for Olimex boards * Update our custom DTS file for A10 and A20 to use the same compatible property names as the vendor ones. Submitted by: Emmanuel Vadot <manu@bidouilliste.com> Differential Revision: https://reviews.freebsd.org/D4792
* Include sys/_task.h into uma_int.h, so that taskqueue.h isn't aglebius2016-02-092-2/+0
| | | | | | requirement for uma_int.h. Suggested by: jhb
* Use designated initialisers for the db disassembler interface to help withandrew2016-02-091-3/+3
| | | | finding the struct when searching for one of its members.
* Ignore invalid page descriptors in ARM64 pmap_mincorewma2016-02-091-0/+12
| | | | | | | | | | | Prevent the function from null-pointer-dereference when unexisting mapping is being processed. Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb, cognet Differential revision: https://reviews.freebsd.org/D5228
* Implement kdb_cpu_sync_icache on arm64.andrew2016-02-051-0/+2
| | | | Sponsored by: ABT Systems Ltd
* Enable checking of the stack alignment. The stack should be aligned to aandrew2016-02-041-2/+2
| | | | | | | 16-byte value. With this the hardware will check if a memory access uses an incorrectly aligned stack pointer as the base address. Sponsored by: ABT Systems Ltd
* Fix build.br2016-02-041-0/+1
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* Fix build.glebius2016-02-041-0/+1
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* Handle a misaligned stack pointer exception from userspace. The exceptionandrew2016-02-031-0/+4
| | | | | | still needs to be enabled, but this will help with testing. Sponsored by: ABT Systems Ltd
* Increase the size of PHYS_AVAIL_SIZE to allow firmware to provide a largeandrew2016-02-021-1/+1
| | | | | | | | number of physical memory locations we can access. This is the case on some HiKey boards that may have UEFI reserved memory dispersed through the physical space. Sponsored by: ABT Systems Ltd
* Ensure we don't overflow the phys_avail array. Some firmware may provideandrew2016-02-021-2/+3
| | | | | | more memory locations than we have space to record. Sponsored by: ABT Systems Ltd
* Increase the space we use after the kernel to 8MiB. On 2GiB HiKey board weandrew2016-02-021-2/+2
| | | | | | would try to access data past this point stopping the boot. Sponsored by: ABT Systems Ltd
* Only look for the ranges property when we have children. This fixes bootingandrew2016-02-021-1/+6
| | | | | | on systems with a gicv2, but no PCIe so no gicv2m. Sponsored by: ABT Systems Ltd
* Implement single stepping on arm64. We need to set the single step bits inandrew2016-02-027-5/+65
| | | | | | | | | the processor and debug state registers. A flag has been added to the pcb to tell us when to enable single stepping for a given thread. Reviewed by: kib Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D4730
* Correctly handle the case where copystr(9) is given a string longer thanandrew2016-02-021-1/+1
| | | | the passed in length. In this case we need to return ENAMETOOLONG.
* Fix sending IPI to all CPUs on ARM64zbb2016-01-291-3/+0
| | | | | | | | | | There is no explanation why IPI ID is incremented here by "16". This should have been removed in r285533 but somehow survived. Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5120
* Framework for ARM64 instruction disassemblerwma2016-01-294-1/+404
| | | | | | | | | | | Provide an easy to use framework for ARM64 DDB disassembler. This commit does not contain full list of instruction opcodes. Obtained from: Semihalf Sponsored by: Cavium Approved by: cognet (mentor) Reviewed by: zbb, andrew, cognet Differential revision: https://reviews.freebsd.org/D5114
* Fix VNIC enumeration after r294993 and r294990zbb2016-01-281-2/+2
| | | | | | | | | | ofw_bus_get_node() must be tested against negative values since missing parent bus method will result in calling the default method which simply returns (-1): sys/dev/ofw/ofw_bus_if.m This was lost in the review process. Obtained from: Semihalf Sponsored by: Cavium
* Add FDT bus capabilities to ThunderX PCI driverzbb2016-01-284-15/+185
| | | | | | | | | | | New ThunderX firmware incorporates modified DTB that presents different device hierarchy. In the new device tree, MDIO devices are below two additional buses that oddly hang on PCI bridge. Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5069
* Correct alloc_ and release_resource methods in thunder_pcie driverzbb2016-01-281-2/+2
| | | | | | | | | | | - Avoid using BUS_ macros as bus_generic_ functions should be used instead. - Fix mistaken device_t pointers in thunder_pcie_alloc_resource. Should use dev->parent method and allocate resource for child device Reviewed by: wma Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5068
* Divide ThunderX PCIe driver to general and FDT partzbb2016-01-284-170/+236
| | | | | | | | | | | - Separate FDT and general PCIe driver parts - Drop some irrelevant printfs that cannot be displayed in FDT attach - Move ranges parsing to FDT portion of PCIe code Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5067
* Fix mutex releasing in ARM64 cpu_switchwma2016-01-281-3/+2
| | | | | | | | | The code should be comparing pointers, not any data gathered from a blocked_lock. Spotted by: cognet Approved by: zbb, cognet (mentor) Differential revision: https://reviews.freebsd.org/D5100
* Convert ss_sp in stack_t and sigstack to void *.jhb2016-01-272-2/+2
| | | | | | | | | | | | POSIX requires these members to be of type void * rather than the char * inherited from 4BSD. NetBSD and OpenBSD both changed their fields to void * back in 1998. No new build failures were reported via an exp-run. PR: 206503 (exp-run) Reviewed by: kib MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D5092
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-274-12/+13
| | | | | | | | | | | | | | | | | | | | Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
* Simplify GICv3 related drivers' namingzbb2016-01-253-5/+5
| | | | | | | | | | | | | | | | | Rename gic_v3_ instances to simply use 'gic' and 'its'. The information about the controller's revision is printed in the device announcement during boot anyway. The intention behind this change is to avoid somewhat misleading GIC instances naming such as: gic_v30 gic_v31 ... etc. Submitted by: Zbigniew Bodek <zbb@semihalf.com> Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5016
* Create proper FDT attachment for GICv2mzbb2016-01-253-21/+45
| | | | | | | | | | | Avoid probing GICv2m to any parent bus/driver. Instead, match GICv2m driver with FDT complatible strings as not every GIC has a MSI controller in the form of GICv2m extension. Submitted by: Zbigniew Bodek <zbb@semihalf.com> Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5015
* Stop including fdt_common.h in the arm64 code. We don't use anything fromandrew2016-01-224-5/+4
| | | | | | | it, however may have relied on header pollution to pull in the needed headers through it Sponsored by: ABT Systems Ltd
* Revert r294267 to avoid using experimental VFS_AIO in ARM64's GENERICzbb2016-01-201-1/+0
| | | | | Remove VFS_AIO from the ARM64's GENERIC as it can be used as a loadable module.
* Enable AIO interface on ARM64 platformszbb2016-01-181-0/+1
| | | | | | | | | | Add VFS_AIO to generic config to allow using of high-performance asynchronous disk AIO operation. Reviewed by: imp Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D4979
* Update ThunderX PCIe driver to fit new DTS layoutzbb2016-01-184-12/+12
| | | | | | | | | | In recent EFI the DTS entries changed for PCIe controller. This commit fixes internal PCIe, external is yet TBD. Submitted by: Dominik Ermel <der@semihalf.com> Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D4976
* Implement vsyscall hack. Prior to 2.13 glibc uses vsyscalldchagin2016-01-091-0/+2
| | | | | | | | | instead of vdso. An upcoming linux_base-c6 needs it. Differential Revision: https://reviews.freebsd.org/D1090 Reviewed by: kib, trasz MFC after: 1 week
* Fix the arm64 build by adding an all-important '&' to get a pointer.ian2016-01-021-1/+1
| | | | | I'm not sure how I missed the error when I test-built here, I guess the pointy hat must have slipped down over my eyes.
* Make using the #address-cells property on the interrupt parent in devicenwhitehorn2016-01-021-3/+0
| | | | | | | tree parsing opt-out rather than opt-in. All FDT-based systems as well as PowerPC systems with real Open Firmware use the CHRP-derived binding that includes it, which makes SPARC the odd man out here. Making it opt-out avoids astonishment on new platform bring up.
* Add an OF_decode_addr() implementation for arm64.ian2016-01-021-0/+54
| | | | Discussed with: andrew
* Make the 'env' directive described in config(5) work on all architectures,ian2016-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | providing compiled-in static environment data that is used instead of any data passed in from a boot loader. Previously 'env' worked only on i386 and arm xscale systems, because it required the MD startup code to examine the global envmode variable and decide whether to use static_env or an environment obtained from the boot loader, and set the global kern_envp accordingly. Most startup code wasn't doing so. Making things even more complex, some mips startup code uses an alternate scheme that involves calling init_static_kenv() to pass an empty buffer and its size, then uses a series of kern_setenv() calls to populate that buffer. Now all MD startup code calls init_static_kenv(), and that routine provides a single point where envmode is checked and the decision is made whether to use the compiled-in static_kenv or the values provided by the MD code. The routine also continues to serve its original purpose for mips; if a non-zero buffer size is passed the routine installs the empty buffer ready to accept kern_setenv() values. Now if the size is zero, the provided buffer full of existing env data is installed. A NULL pointer can be passed if the boot loader provides no env data; this allows the static env to be installed if envmode is set to do so. Most of the work here is a near-mechanical change to call the init function instead of directly setting kern_envp. A notable exception is in xen/pv.c; that code was originally installing a buffer full of preformatted env data along with its non-zero size (like mips code does), which would have allowed kern_setenv() calls to wipe out the preformatted data. Now it passes a zero for the size so that the buffer of data it installs is treated as non-writeable.
* Decode and print the ID_AA64* registers on boot. These registers holdandrew2015-12-304-30/+640
| | | | | | | | | | | information on what the core supports. In most cases these will be identical across most CPUs in the SoC, however there may be the case where, with a big.LITTLE setup they may differ. In this case we print the decoded data on all CPUs. Reviewed by: kib Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D4725
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