summaryrefslogtreecommitdiffstats
path: root/sys/arm/xscale
Commit message (Collapse)AuthorAgeFilesLines
* Fill in dump_avail[] before pmap_boostrap() is called so thatcognet2006-08-271-4/+4
| | | | ARM_USE_SMALL_ALLOC work.
* Finally bring it support for the i80219 XScale processor.cognet2006-08-2412-71/+729
| | | | Submitted by: Max M. Boyarov <m.boyarov bsd by>
* Rewrite ARM_USE_SMALL_ALLOC so that instead of the current behavior, it mapscognet2006-08-081-4/+9
| | | | | | | | whole the physical memory, cached, using 1MB section mappings. This reduces the address space available for user processes a bit, but given the amount of memory a typical arm machine has, it is not (yet) a big issue. It then provides a uma_small_alloc() that works as it does for architectures which have a direct mapping.
* Remove a bogus i = 0.kevlo2006-08-081-1/+1
| | | | Approved by: cognet
* Cleanup.kevlo2006-07-252-18/+1
| | | | Approved by: cognet
* Remove prototype for the undefined function counterhandler().cognet2006-07-141-1/+0
| | | | Submitted by: kevlo
* Remove a bogus, useless, "i++".cognet2006-06-061-1/+0
|
* Remove any reference to enable_mmu(), it's been gone for a long time.cognet2006-05-261-1/+0
| | | | Submitted by: kevlo
* We have an implementation of generic_bs_rr_1, so use it, as some drivers usecognet2006-05-191-1/+1
| | | | | | it. Submitted by: kevlo
* Setting the rid of the resource is a good idea, but we still need to returncognet2006-05-051-0/+1
| | | | the resource after.
* When returning a resource that we've allocated with rman_reserve_resource,imp2006-04-203-4/+10
| | | | go ahead and set the rid for that resource.
* We need to adjust the bus handle if the resource is SYS_RES_MEMORY, NOTcognet2006-04-131-1/+2
| | | | SYS_RES_IOPORT.
* Add a new option, XSCALE_DISABLE_CCNT, to not use the xscale ccnt as acognet2006-04-061-0/+26
| | | | timecounter (because gxemul doesn't emule it yet).
* Use BUS_DMA_COHERENT.cognet2006-03-022-2/+2
|
* Don't forget to set the address of the next descriptor to 0 when we'recognet2006-02-041-0/+1
| | | | | zeroing a physical page, or we could end up re-zeroing portions of memory we have zeroed before, which is clearly not wanted.
* Donc recompute the io port address if it's already the good one.cognet2006-01-231-3/+5
|
* Tweak how the MD code calls the fooclock() methods some. Instead ofjhb2005-12-221-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | passing a pointer to an opaque clockframe structure and requiring the MD code to supply CLKF_FOO() macros to extract needed values out of the opaque structure, just pass the needed values directly. In practice this means passing the pair (usermode, pc) to hardclock() and profclock() and passing the boolean (usermode) to hardclock_cpu() and hardclock_process(). Other details: - Axe clockframe and CLKF_FOO() macros on all architectures. Basically, all the archs were taking a trapframe and converting it into a clockframe one way or another. Now they can just extract the PC and usermode values directly out of the trapframe and pass it to fooclock(). - Renamed hardclock_process() to hardclock_cpu() as the latter is more accurate. - On Alpha, we now run profclock() at hz (profhz == hz) rather than at the slower stathz. - On Alpha, for the TurboLaser machines that don't have an 8254 timecounter, call hardclock() directly. This removes an extra conditional check from every clock interrupt on Alpha on the BSP. There is probably room for even further pruning here by changing Alpha to use the simplified timecounter we use on x86 with the lapic timer since we don't get interrupts from the 8254 on Alpha anyway. - On x86, clkintr() shouldn't ever be called now unless using_lapic_timer is false, so add a KASSERT() to that affect and remove a condition to slightly optimize the non-lapic case. - Change prototypeof arm_handler_execute() so that it's first arg is a trapframe pointer rather than a void pointer for clarity. - Use KCOUNT macro in profclock() to lookup the kernel profiling bucket. Tested on: alpha, amd64, arm, i386, ia64, sparc64 Reviewed by: bde (mostly)
* Remove #undef DDB I shouldn't have committed.cognet2005-12-211-1/+0
|
* - Better use of the busdma API.cognet2005-12-092-47/+69
| | | | - Use spin locks instead of sleep locks.
* Fix a harmless bug in the way we allocate the early PTEs.cognet2005-12-091-3/+2
|
* The IQ80321 clock is 200MHz, but the IQ80321 is 198MHz, so add a kernel optioncognet2005-12-092-0/+6
| | | | to override the frequency
* Use a magic number to know we were started from the elf wrapper.cognet2005-11-241-5/+5
| | | | Add a dummy _start function to make the non-elf version of the wrapper work.
* Cleanup.cognet2005-10-201-13/+1
|
* Use the clock count register as a timecounter, as it's more accurate.cognet2005-10-171-16/+13
|
* Fix build when DDB isn't defined.cognet2005-10-041-0/+2
|
* Import dummy drivers for the i80321 DMA controller and AAU.cognet2005-10-035-2/+628
| | | | | | The DMA controller driver only knows how to do memory to memory copies, and the AAU driver how to zero a chunk of memory. Use them to process big (>=1KB) copying/zeroing.
* Provide a dump_avail[] variable, which contains the page ranges to becognet2005-10-031-10/+32
| | | | | | | dumped. For iq31244_machdep.c, attempt to recognize hints provided by the elf trampoline.
* Fix multiple abuses of __RMAN_RESOURCE_VISIBLE in the arm code.cognet2005-09-255-30/+31
| | | | Spotted out by: phk
* Remove the va == pa mapping.cognet2005-06-231-10/+7
| | | | Approved by: re (blanket)
* - MFp4: modify slightly the arm intr API, there's arm CPUs with more than 32cognet2005-06-093-9/+28
| | | | | interrupts. - Implement teardown methods where appropriate.
* Add a new arm-specific option, ARM_USE_SMALL_ALLOC. If defined, it providescognet2005-06-071-53/+43
| | | | | an implementation of uma_small_alloc() which tries to preallocate memory 1MB per 1MB, and maps it into a section mapping.
* Remove a useless printf.cognet2005-06-031-1/+0
|
* Increase the refresh rate.cognet2005-05-251-1/+1
|
* Allocating the memory for the kernel stack one time is enough.cognet2005-04-271-7/+0
|
* Don't announce the range SDRAM_START-freemempos until I figure out what'scognet2005-04-071-5/+5
| | | | going on, it produces random memory corruption.
* pmap_update() is gone.cognet2005-04-071-1/+0
|
* Bring back some of the cleanups and fixes jmg did in the TS7200 port.cognet2005-03-171-18/+16
|
* Use PCIR_BARS instead of PCIR_MAPS.cognet2005-03-172-16/+17
|
* Instead of using sysarch() to store-retrieve the tp, add a magic address,cognet2005-02-262-0/+3
| | | | | | | | | | | ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu
* MFp4: get the code that set the pc correctly to work, remove a few IQ31244cognet2005-02-201-11/+11
| | | | | | | specific mappings from locore.S, re-organize iq31244_machdep.c to work with the new locore.S Spotted out by: jmg
* Remove unused prototype.cognet2005-02-131-1/+0
|
* Remove redondant includes.cognet2005-02-131-2/+0
|
* Don't prototype pmap_kenter().cognet2005-02-131-1/+1
|
* Remove references to non-existing symbols DO_corb and got_mmu.cognet2005-01-201-7/+0
| | | | While I'm there, remove dead code.
* Add a new sysctl, hw.sevenseg.freq, to control the update frequency.cognet2005-01-161-1/+6
|
* Add support for the IQ31244 7 seg display.cognet2005-01-154-0/+390
| | | | Obtained from: NetBSD
* Start the license statement with /*-cognet2005-01-151-1/+1
|
* Use device_set_desc().cognet2005-01-151-0/+2
|
* Add the i80321 watchdog.cognet2005-01-152-0/+2
|
* Add a driver for the i80321 watchdog.cognet2005-01-151-0/+149
| | | | Obtained from: NetBSD
OpenPOWER on IntegriCloud