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* Always compile in PPS capture. Use the same device name used in 11-current.ian2015-08-231-18/+1
| | | | | | This is a direct commit to 10-stable because the corresponding changes in 11 are bound up with all the device-tree rework for beaglebone. This somewhat aligns the features between the two branches, from a user's perspective.
* MFC r279816, r279826:ian2015-05-232-2/+3
| | | | | | Attach the prcm clock driver early, so it can set the mpcore timer frequency. Change the name of the dmtimer pps device from /dev/ppsN to /dev/dmtppsN.
* MFC r276021, r279766:ian2015-05-231-20/+29
| | | | | | | Reduce the diff in the Ti aintc between head and arm_intrng Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in both the post-filter and post-thread callbacks.
* MFC r279312:dim2015-03-013-6/+6
| | | | | | | Fix a number of -Wcast-qual warnings under sys/arm. No functional change. Submitted by: andrew
* MFC r279311:dim2015-03-011-1/+1
| | | | | | | In sys/arm/ti/am335x/am335x_rtc.c, fix a clang 3.6.0 warning about am33x_rtc_softc::sc_irq_res (which is an array) never being NULL. Submitted by: andrew
* MFC r274670, r274671, r276168:loos2015-02-141-10/+0
| | | | | | | | | | | | | | Moves all the duplicate code to a single function. Verify for invalid modes and unwanted flags before pass the new flags to driver. Make gpio_default_map_gpios() static. No functional changes. Improves the GPIO API description a little bit. gpio_pin_max must return the maximum supported pin number and not the total number of pins on the system.
* MFC r273799:loos2015-02-141-2/+2
| | | | | | | | Make the GPIO children attach to the first unit available and not only to unit 0. This fix a bug where a GPIO controller could fail to attach its children (gpioc and gpiobus) if another GPIO driver attach first.
* MFC r277454, r277460, r277465, r277466, r277467, r277469, r277470, r277471,ian2015-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479, r277480, r277512, r277516: Add inline implementations of arm bus_space_read/write_N(). Revise the arm bus_space implementation to avoid dereferencing the tag on every operation to retrieve the bs_cookie value almost nothing actually uses. Use the explicit member initializer style to init the bus_space struct. Use arm/bus_space-v6.c for all armv6 systems Consolidate many identical implementations of bus_space to a single common tag and implementation shared by armv4 and armv6. Micro-optimize the new arm inline bus_space implementation by grouping all the data the inline functions access together at the start of the bus_space struct so that they all fit in a single cache line.
* MFC r276047: Add -march=armv7a to the kernel compile for all v7a ARM systems.ian2015-02-111-0/+1
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* MFC r277958, r278061:rpaulo2015-02-092-7/+8
| | | | | | ti_pruss: make sure the mmap'ed memory region is uncacheable. am335x_clk_pruss_activate(): use the L3F clock.
* MFC r266969 and r276717:hselasky2015-02-052-1/+3
| | | | | | Add 64-bit DMA support in the XHCI controller driver. - Fix some comments and whitespaces while at it. - Add support for PAE.
* MFC r277042:loos2015-02-027-3/+363
| | | | | | | | | | | | | | | Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p. To cut off the power we need to start the shutdown sequence by writing the OFF bit on PMIC. Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE pin when it is ready for the PMIC to cut off the power. This is done by triggering the ALARM2 interrupt on SoC RTC. The RTC driver only works in power management mode which means it won't provide any kind of time keeping functionality. It only implements a way to trigger the ALARM2 interrupt when requested.
* MFC r261459, r273045, r273047.loos2015-02-023-11/+7
| | | | | | | | | | | | r261459: Remove trailing tabs causing false grep positives. r273045: Sort the files in the am355x directory. r273047: Remove the need for files.beaglebone and std.beaglebone by moving the one option they defined into files.am335x.
* MFC r276249:loos2015-01-091-9/+18
| | | | | | | | | | | | | | | | Fix the musb initialization sequence on AM335x. According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the USB reset pulse has an undocumented duration of 200ns and during this period the module must not be acessed. We wait for 100us to take into account for some imprecision of the early DELAY() loop. This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at boot while resetting the musb subsystem. While here, enable the USB subsystem clock before the first access.
* MFC r273606:loos2015-01-091-5/+14
| | | | | | | | | | | | | | | | | Fix cpsw_detach() to not panic when called from cpsw_attach(). For an unkown reason (at moment), sometimes if_cpsw cannot read from PHY and fails to attach calling cpsw_detach() which end up in a panic. Fix it by doing the proper check before detach the miibus and also fix the leak of few variables. And to actually make it work, ether_ifattach() has to be moved to the end of cpsw_attach() to avoid a race where calling ether_ifdetach() before domain_init() (which will only run later on) would make it crash at INP_INFO_RLOCK() on in_pcbpurgeif0(). Tested on: BBB (am335x)
* MFC r276029:ian2014-12-271-1/+1
| | | | | Remove a volatile qualifier on return type that is ignored and results in a -Wreturn-type warning when compiled with gcc.
* MFC r275944, r275946, r275949, r275950:ian2014-12-271-9/+48
| | | | | | | | | | | Add code to set and reset open-drain mode on the bus when requested. When command and data interrupts have been aggregated together, don't do the data-completed processing if a command-error interrupt is also asserted. Add a new sdhci quirk, SDHCI_QUIRK_WAITFOR_RESET_ASSERTED, to work around TI OMAP controllers which will return the reset-in-progress bit as zero if you read the status register too fast after setting the reset bit.
* MFC r274641, r274644, r274822, r276049:ian2014-12-271-19/+33
| | | | | | | | | | | Allow i2c bus speed to be configured via hints, FDT data, and sysctl. Implement bus speed setting for OMAP4, AM335x, and imx5/6. Fix the i2c bus speed divisors for TI OMAP4 and AM335x to give the advertised 100, 400, and 1000 KHz speeds. PR: 195009
* Clean up our ARM assembly:andrew2014-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MFC 275256: Switch to the ARM unified assembly language as the clang integrated as only supports it. Binutils supports it when the ".syntax unified" directive is set. Sponsored by: ABT Systems Ltd MFC 275264: Update _ENTRY to use _EENTRY to reduce the common code. MFC 275321: Remove extra labels, ENTRY_NP already provides them. Sponsored by: ABT Systems Ltd MFC 275322: Correctly a few incorrect uses of ENTRY/EENTRY and END/EEND Sponsored by: ABT Systems Ltd MFC 275416: Fix the name of the coprocessor to include the "p" prefix, the clang integrated assembler expects this. Sponsored by: ABT Systems Ltd MFC 275418: Switch to unified syntax so these can be built with clang 3.5. Sponsored by: ABT Systems Ltd MFC 275519: Add missing END macros to some of the xscale functions. Sponsored by: ABT Systems Ltd MFC 275520: Use the unified syntax in a few more assembly files Sponsored by: ABT Systems Ltd MFC 275521: Set the alignment to 4-bytes after a string as clang 3.5 can switch to thumb mode if this is incorrect. Sponsored by: ABT Systems Ltd MFC 275522: Place the literal pool after a RET otherwise clang 3.5 tries to put it too far away from a ldr psuedo instruction. With this clang will place the literal value here where it's close enough to be loaded. Sponsored by: ABT Systems Ltd MFC 275523: Switch to an armv6k cpu, without this clang 3.5 complains "bx lr" is unsupported as it needs a newer cpu. Sponsored by: ABT Systems Ltd MFC 275524: Switch to a .cpu directive. These will work when clang 3.5 is imported where the .arch directive is a nop. Sponsored by: ABT Systems Ltd
* MFC r275376:rpaulo2014-12-091-25/+6
| | | | | Allow multiple devices to mmap. It's impossible to prevent this with checks on the open/close functions.
* MFC: r266336, r270230 and r273263loos2014-10-272-732/+540
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r266336: Allow us to compile the Ti iic driver for both OMAP4 and AM335x. r270230: Rewrite of ti_i2c based on gonzo's patch, fix the following bugs/problems: . interrupt storm detected on "intr70:"; throttling interrupt source; . Added access serialization on iicbus_transfer(), previously there was no such protection and a new transfer could easily confuse the controller; . Add error checkings (i.e. stop the transfer when a error is detected and do _not_ overwrite the previous error); . On command done interrupt do not assume that the transfer was finished sucessfully as we will receive the command done interrupt even after errors; . Simplify the FIFO handling; . Reset the FIFO between the transfers as the FIFO may contain data from the last (failed) transfer; . Fix the iicbus speed for AM335x, which in turn will make better use of the I2C noise filter (set to one internal clock cycle); . Move the read and write handler to ithread instead of notifying the requesting thread with wakeup(9); . Fix the comments based on OMAP4 TRM. The above changes allows me to read the EDID from my HDMI monitor on BBB with gonzo's patches to support TDA19988 (which does 128 bytes reads) and repeatedly scan the iicbus (with a modified i2c(8)) without lock up the bus. r273263: Fix the chan address for mtx_sleep() on bus wait. Without this fix the threads waiting for the bus would never wake.
* MFC r273281:rpaulo2014-10-261-1/+5
| | | | Style changes as pointed out by stas@.
* MFC r273261:rpaulo2014-10-251-2/+0
| | | | Remove an unused mutex.
* MFC r273258:rpaulo2014-10-251-5/+3
| | | | Make the ti_mbox and ti_pruss drivers optional.
* MFC r273257:rpaulo2014-10-253-0/+351
| | | | | | | | | | | | | | Add a driver for the TI watchdog. The TI watchdog timer is present on BeagleBone's. Since 2014, U-Boot has been booting the BeagleBone with the watchdog enabled. We need to disable it on boot to avoid a spurious reset. The timer isn't exactly precise, but it will do as a watchdog. This is also a reflection of the watchdog(9) API. In the future, we could handle interrupts, but the watchdog(9) API needs to be a bit smarter before that can happen.
* MFC: r270885, r270948marius2014-09-031-0/+1
| | | | | | | | | | | | - Nuke unused sdhci_softc. - Static'ize sdhci_debug local to sdhci.c. - Const'ify PCI device description strings. - Nuke redundant resource ID members from sdhci_pci_softc. - Nuke unused hw.sdhci_pci.debug tunable. - Add support for using MSI instead of INTx, controllable via the tunable hw.sdhci.enable_msi (defaulting to on) and tested with a RICOH R5CE823 SD controller. - Use NULL instead of 0 for pointers.
* MFC r267021:loos2014-08-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FreeBSD, historically, has always used 8-bit addresses for i2c devices (7-bit device address << 1), always leaving the room for the read/write bit. This commit convert ti_i2c and revert r259127 on bcm2835_bsc to make them compatible with 8-bit addresses. Previous to this commit an i2c device would have different addresses depending on the controller it was attached to (by example, when compared to any iicbb(4) based i2c controller), which was a pretty annoying behavior. Also, update the PMIC i2c address on beaglebone* DTS files to match the new address scheme. Now the userland utilities need to do the correct slave address shifting (but it is going to work with any i2c controller on the system). Discussed with: ian MFC r267834: Clarify the expected usage of I2C 7-bit slave addresses on ioctl(2) interface. While here add the cross reference to iic(4) on iicbus(4). CR: D210 Suggested by: jmg
* MFC r266923:loos2014-08-201-9/+1
| | | | | | | | | | | | | | | | | | | | Ignore IIC_ENOADDR from iicbus_reset() as it only means we have a master-only controller. This fixes the iic bus scan with i2c(8) (on supported controllers). Tested with gpioiic(4). MFC r267009: Remove the unnecessary i2c slave address assignment. The ti_i2c controller only works in the master mode and the i2c address passed on iicbus_reset() is used to set the controller slave address when operating as an i2c slave (which isn't currently supported). When talking to a slave, the slave address is correctly provided to ti_i2c_tranfer().
* MFC r266960:loos2014-08-203-2/+5
| | | | | | | | | | | Configure the analog input 7 which, on BBB, is connected to the 3V3B rail through a voltage divisor (R163 and R164 on page 4 of BBB schematic). Add a note about this on ti_adc(4) man page. The ti_adc(4) man page will first appear on 10.1-RELEASE. Suggested by: Sulev-Madis Silber (ketas) Manual page reviewed by: brueffer (D127)
* MFC r266937:loos2014-08-201-9/+121
| | | | | | | | | | | | | | | | | | Export two new settings for the AM335x PWM, the clock prescaler (clkdiv) and the actual PWM frequency. Enforce the maximum value for the period sysctl. The frequency systcl now allows the direct setting of the PWM frequency (it will try to find the better clkdiv and period for a given frequency, i.e. the ones that will give the better PWM resolution). This allows the use lower frequencies on the PWM. Without changing the clock prescaler the minimum PWM frequency was 1.52kHz. PWM frequencies checked with an osciloscope. PWM output tested with some R/C servos at 50Hz.
* MFC r269393, r269394, r269395:ian2014-08-111-1/+2
| | | | | | Fix parsing of arch extensions in binutils/gas. Use ".arch_extension sec" when compiling ARM TI code that uses the security extensions.
* MFC 266621: Eliminte spurious interrupts caused by ARM weak memory ordering.ian2014-05-271-0/+2
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* MFC r264096, r264097, r264099 r264100, r264101, r264102, r264119:ian2014-05-272-18/+62
| | | | | | Fixes to the ti_sdhci and sdhci drivers (fix clock divisor calcs). Use the ti_sdhci driver instead of ti_mmchs for Pandaboard.
* MFC 265035: Move duplicated code to print l2 config into the common code.ian2014-05-171-32/+0
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* MFC 264019, 264041, 264048, 264049, 264050, 264051ian2014-05-171-2/+2
| | | | | | | | | | | | | | Add support for event timers whose clock frequency can change while running. Apparently all ARM configs build kern_et.c, but only a few of them also build kern_clocksource.c, un-break the build by not referencing functions in kern_clocksource if NO_EVENTTIMERS is defined. Add variable-frequency support to the arm mpcore eventtimer driver. mpcore_timer: Disable the timer and clear any pending bit, then setup the new counter register values, then restart the timer. Also re-nest the parens properly for casting the result of converting time and frequency to a count.
* Adds the ADC driver for TI AM3xxx SoC family.loos2014-05-176-0/+790
| | | | | | | | | | | | | | | The ADC has a 12bit resolution and its raw output can be read via sysctl(8) interface. The driver allows the setup of ADC clock, samples average and open delay (the number of clock cycles to wait before start the conversion). The TSC_ADC module is set in the general purpose mode (no touchscreen support). Tested on Beaglebone-black. Written based on AM335x TRM.
* MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,ian2014-05-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 263030, 263033, 263034, 263056, 263057, Remove all the redundant external declarations of exception vectors and runtime setting of the pointers that's scattered around various places. Remove all traces of support for ARM chips prior to the arm9 series. Make the default exception handler vectors point to where I thought they were already pointing: the default handlers (not a panic that says there is no default handler). Eliminate irq_dispatch.S. Move the data items it contained into arm/intr.c and the functionality it provided into arm/exception.S. Move the exception vector table (so-called "page0" data) into exception.S and eliminate vectors.S. Change the way the asm GET_CURTHREAD_PTR() macro is defined so that code using it doesn't have to have an "AST_LOCALS" macro somewhere in the file. Arrange for arm fork_trampoline() to return to userland via the standard swi_exit code in exception.S instead of having its own inline expansion of the DO_AST and PULLFRAME macros. Now that the PUSHFRAME and PULLFRAME macros are used only in the swi entry/exit code, they don't need to be macros. Except that didn't work and the whole change was reverted. Remove some unnecessary indirection and jump right to the handler functions. Use panic rather than printf to "handle" an arm26 address exception (should never happen on arm32). Remove the unreferenced DATA() macro. Remove #include <machine/asmacros.h> from files that don't need it.
* MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,ian2014-05-172-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949, 262950 Strip arm/conf/DEFAULTS down to just items that are mandatory for running the architecture. Move all the files named foo/common.c to foo/foo_common.c Initial cut for DTS on the hl201 board. Add commented out dts for sam9260ek as well as early printf support. Make clock optional on uart nodes, then back it out ("I don't know what I was thinking, but it is lame.") Set the baud rate if it isn't 0 Make at91_soc_id() public. Properly round at91 resource on unmapping. Move AT91 AIC related stuff to own file. Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32. Follow r262916 with one more config file that references a renamed common.c Remove bogus AT91 define that causes compile errors. Most of the defines for SAM9X are going away soonish anyway (once FDT works), but until then... Remove all dregs of a per-thread undefined-exception-mode stack. Rework the VFP code that handles demand-based save and restore of state. Always call vfp_discard() on thread death. When a thread begins life it doesn't own the VFP hardware state on any cpu. Make undefined exception entry MP-safe.
* MFC 258211, 257775, 258096,ian2014-05-162-114/+4
| | | | | | Add mbox and pruss drivers to ti build. Use common bus_space-v6 instead of local copies.
* MFC 262695, 262708, 262709, 262710, 262711, 262728, 262870, 262877, 262880,ian2014-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 262885, 262891, 262903, imx6: Add a tunable to set the number of active cores, enable SMP by default. ffec: Fix multicast filtering. Allwinner a10/a20... - Add gpio and clock bits for A10/A20's EMAC ethernet controller driver - EMAC gpio configuration - EMAC clock activation - Add Static Random Access Memory controller driver for A10/A20. A10/A20's SRAM is used by devices, such as CPU, EMAC, for extra fast memory or as cache. - Add EMAC 10/100 Ethernet controller driver for A10/A20. It is available mostly in A10 devices like Hackberry, Marsboard, Mele A1000, A2000, A100 HTPC, cubieboard1 and A20 device like cubieboard2. TX performance can be improved using both channels 0 and 1. RX performance is poor and needs improvement with the assistance of external DMA controller in case there - Add EMAC and SRAM controller entries to FDT. - Add EMAC device to kernel config files and enable EMAC, SRAM drivers. OMAP: When calculating the MPU freq, make sure not to overflow. Vybrid: - Add driver for Port control and interrupts (PORT). - Export panel info to DTS - Reset all the layers before setup first one - Enable display nandfs: Slight code reordering to make error branch last. Add option TMPFS to arm/conf/DEFAULTS, remove it from the few configs that have it individually. Concensus on freebsd-arm@ is that it should be included in all ARM kernels. Fix the arm sys_sigreturn(): its argument is a struct ucontext, not a struct sigframe containing the struct ucontext.
* MFC r262534, r262548, r262549, r262552, r262568, r262581, r262583, r262584,ian2014-05-161-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | r262585, r262587, r262696, r262712 Replace many pasted identical definitions of cpu_initclocks() with a common implementation in arm/machdep.c. aicasm: Don't complain about missing prototypes to ease bootstrap issues. Vybrid: Add driver for Inter-Integrated Circuit (I2C). imx6: Initialize the Low Power Mode bits to keep the ARM cores running during WFI. All our current ARM multi-core systems have all cores in one package with a shared L2 cache, reflect that in the common cpu_topo() routine. mpcore timer: Supply a DELAY() implementation via weak linkage, so that SoC-specific code can supply a better implementation. imx6: Add some rudimentary voltage control. Add an armv7 implementation of cpu_sleep(). Add __used attribute so that the DELAY implementation doesn't get optimized away as unreferenced, causing linker errors when trying to resolve the weak reference to the missing function.
* MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,ian2014-05-161-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r262482, r262483, r262531, Move the declaration for mpentry() into a header file instead of pasting it into a bunch of different .c files. If the L2 cache type is PIPT, pass a physical address for a flush. Actually set the proper bit to indicate TTB shared memory. Add a new cache maintenance function, idcache_inv_all, to the table, and implementations for each of the chips we support. Invalidate caches immediately upon entry to init_secondary(). Also set the Bufferable bit in the PDE entries of the secondary processor startup pagetables. Add the bits needed to run SMP on imx6. Invalidate the SCU cache tag ram on all 4 cores, not just 1-3. Minor tweaks to the imx GPT timer Vybrid enhancements... - Pin configuration is a complete iomux register now and includes drive strength, pull mode, mux mode, speed, etc. - Add i2c devices to the tree - Add IPG clock - Add support for Quartz Module. - Pin configuration is a complete iomux register now and includes drive strength, pull mode, mux mode, speed, etc. - Add i2c devices to the tree - Add IPG clock
* MFC r259270loos2014-05-151-1/+0
| | | | | After r266105 ofw_iicbuc.c will be built by default for any kernel which includes options 'iicbus' and 'fdt'. Remove the (now) unnecessary entries.
* MFC r261414, r261415, r261417, r261418, r261419ian2014-05-151-1/+0
| | | | | | | | | | | | | Don't call device_set_ivars() for the mmchs Change the way pcpu and curthread are stored per-core Invalidate cachelines for bounce pages on PREREAD too, there may still be stale entries from a previous transfer. Only use the CPU ID register if SMP is defined. Some non-MPCore armv6 cpu, such as the one found in the RPi, don't have it, and just hang when we try to access it.
* MFC r261410ian2014-05-1518-0/+68
| | | | | Follow r261352 by updating all drivers which are children of simplebus to check the status property in their probe routines.
* MFC r259125, r264019, r264083, r264153, r264197loos2014-05-152-167/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259125: Fix a few typos on the scm (control module) pin mux definitions. r264019: Fix some of the style(9) problems on ti_gpio. Remove redundant code and declarations. r264083: Move the GPIO bank initialization to a new function to make easier to detect errors. Reset the GPIO module during the initialization. This is guaranteed to be the same as a hardware reset. Tested on AM335x (BBB) and checked against the omap3 and omap4 TRM. Do a better job freeing resources when there are errors and on ti_gpio_detach(). r264153: - Fix the setup of interrupts for banks 2 and 3 on AM335x. On AM335x each one of the four GPIO banks has two physical interrupt lines, so we now allocate resources and setup our interrupt handler for all the (8) available interrupts. On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6 banks, 6 interrupts), but there are two set of registers where the first one is used to setup the delivery of interrupts to the MPU and the second set, setup the delivery of interrupts to the DSP. On AM335x, each set of registers controls each one of the interrupt lines. - Remove nonexistent registers for OMAP4 and AM335x, replace their use with the correct ones for these SoCs. - Remove stray whitespace. r264197: Partially revert r264083. While it is the recommended initialization procedure, it hangs on the reset of the second GPIO module on pandaboard. Removes the module reset for now as more investigation is needed.
* MFC r261252, r261279, r261304, r261305, r261322, r261336, r261337, r261338,ian2014-05-152-4/+0
| | | | | | | | | | | | | | | | | r261353 Fix the name of the dts file for the HL201... When mapping an address, the bsh needs the same offset we do for other things. Add explicit depends on bus_if.h and device_if.h to avoid a chicken and egg problem in some compilation environments. Switch to using PAs rather than VAs for the addresses we map for devices. This is a nop, except for what's reported by atmelbus for the resources. Comment cleanups. Move things around for diff reduction against FDT work.
* MFC r258046, r258047, r258050, r259035, r259036, r259037, r261842, r261843,loos2014-05-151-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r261844, r261845, r261846, r262194, r262522, r262559 r258046: Fix a typo on a comment in ofw_bus_if.m, the default method will return -1 when a node doesn't exist. r258047: Move the KASSERT() check to the point before the increase of number of pins. r258050: Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so it can be overriden by its OFW/FDT version. Give a chance for GPIO devices that implement the device_identify method to attach. r259035: Remove unnecessary includes and an unused softc variable. While here apply two minor style(9) fixes. r259036: Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4) control callback function. This makes gpioled(4) works even if the pin is accidentally set to an input. r259037: Fix the pin value reading on AM335x. Because of the inverted logic it was always returning '0' for all the reads, even for the outputs. It is now known to work with gpioiic(4) and gpioled(4). r261842: Add an OFW GPIO compatible bus. This allows the use of the DTS files to describe GPIO bindings in the system. Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between the OFW and the non OFW versions of GPIO bus. Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus. r261843: Add OFW support to the in tree gpio compatible devices: gpioiic(4) and gpioled(4). Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx) used as reference for a non OFW-based system. Update the gpioled(4) and gpioiic(4) man pages with some details and examples about the FDT/OFW support. Some compatibility details pointed out by imp@ will follow in subsequent commits. r261844: Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems. This change makes ofw_iicbus attach to iicbb(4) controllers in addition to the already supported i2c host bridges (iichb). On iicbb(4) allow the direct access of the OFW parent node by its children, so they can be directly attached to iicbb(4) node on the DTS without the need of describing the i2c bus. r261845: Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this change the gpio children can be described as directly connected to the GPIO controller without the need of describing the OFW GPIO bus itself on the DTS file. With this commit the OFW GPIO bus is fully functional on BBB and RPi. GPIO controllers which want to use the OFW GPIO bus will need similar changes. r261846: Make the gpioled(4) work out of the box on BBB. Add gpioled(4) to BEAGLEBONE kernel and add the description of the four on-board leds of beaglebone-black to its DTS file. r262194: Remove an unnecessary header. r262522: Fix make depend for iicbus. r262559: Inspired by r262522, fix make depend. This fixes the build of gpio modules.
* MFC r258209, r258210, r261211,ian2014-05-144-0/+662
| | | | | | | | Add a driver for the Texas Instruments Mailbox hardware. Add a driver for the TI Programmable Realtime Unit Subsystem. fix args to mtx_init
* MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,ian2014-05-141-29/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373, r260374, r260375 Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs. Correct license statements to reflect the fact that these files were all derived from sys/arm/mv/bus_space.c. In pmap_unmapdev(), remember the size, and use that as an argument to kva_free(), or we'd end up always passing it a size of 0 In pmap_mapdev(), first check whether a static mapping exists, Convert TI static device mapping to use the new arm_devmap_add_entry(), Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy. Eliminate use of fdt_immr_addr(), it's not needed for tegra Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make static device mappings. Retire machine/fdt.h as a header used by MI code, as its function is now obsolete. This involves the following pieces: - Remove it entirely on PowerPC, where it is not used by MD code either - Remove all references to machine/fdt.h in non-architecture-specific code (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat non-arch-specific). - Fix code relying on header pollution from machine/fdt.h includes - Legacy fdtbus.c (still used on x86 FDT systems) now passes resource requests to its parent (nexus). This allows x86 FDT devices to allocate both memory and IO requests and removes the last notionally MI use of fdtbus_bs_tag. - On those architectures that retain a machine/fdt.h, unused bits like FDT_MAP_IRQ and FDT_INTR_MAX have been removed. Add #include <machine/fdt.h> to a few files that used to get it via pollution Enable the mv cesa security/crypto device by providing the required property in the dts source, and adding the right devices to the kernel config. Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs, related to setting up static device mappings. Since it was only used by arm/mv/mv_pci.c, it's now just static functions within that file, plus one public function that gets called only from arm/mv/mv_machdep.c. Switch RPi to using arm_devmap_add_entry() to set up static device mapping. Allow 'no static device mappings' to potentially work. Don't try to find a static mapping before calling pmap_mapdev(), that logic is now part of pmap_mapdev() and doesn't need to be duplicated here. Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
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