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path: root/sys/arm/mv/mvwin.h
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* Open window to bootROM memory on Armada38x to allow CPU1 to bootzbb2016-01-201-0/+19
* Correct MV_DDR_CADR_BASE definiton in mvwin.hzbb2016-01-201-1/+1
* Improve definitions of CPU/PCIe windows for Armada38xzbb2016-01-201-2/+8
* Set IO Sync Barrier flags for all Mbus devices on Armada38xzbb2016-01-201-0/+10
* Introduce initial support for Marvell Armada38xzbb2016-01-201-1/+3
* Disable decoding windows with no FDT entry.gber2013-05-061-0/+2
* Move initialization of CESA decoding windows from common sectiongber2013-05-061-5/+17
* pci: Implement new memory and io space allocator for PCI.gber2012-09-141-3/+4
* Add support for Armada XP A0.gber2012-09-141-0/+2
* Merging of projects/armv6, part 7gonzo2012-08-151-50/+142
* Trim trailing whitespace...imp2012-06-131-1/+1
* Add architecture dependent code to support NAND Framework on Marvell SoCs.gber2012-05-181-16/+11
* Convert Marvell ARM platforms to FDT convention.raj2010-06-131-53/+59
* Enable all populated TWSI (I2C) controllers on Marvell SOCs.raj2009-06-251-1/+2
* Move the memory layout definitions and logic from mvreg.h to mvwin.hmarcel2009-06-121-0/+279
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