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* Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,ian2014-01-051-4/+4
| | | | | | related to setting up static device mappings. Since it was only used by arm/mv/mv_pci.c, it's now just static functions within that file, plus one public function that gets called only from arm/mv/mv_machdep.c.
* Retire machine/fdt.h as a header used by MI code, as its function is nownwhitehorn2014-01-051-0/+1
| | | | | | | | | | | | | | | obsolete. This involves the following pieces: - Remove it entirely on PowerPC, where it is not used by MD code either - Remove all references to machine/fdt.h in non-architecture-specific code (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat non-arch-specific). - Fix code relying on header pollution from machine/fdt.h includes - Legacy fdtbus.c (still used on x86 FDT systems) now passes resource requests to its parent (nexus). This allows x86 FDT devices to allocate both memory and IO requests and removes the last notionally MI use of fdtbus_bs_tag. - On those architectures that retain a machine/fdt.h, unused bits like FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
* platform_devmap_init() was renamed initarm_devmap_init() in r257669, updategavin2013-11-241-1/+1
| | | | comments to match.
* Call initarm_lastaddr() later in the init sequence, after establishingian2013-11-051-4/+8
| | | | | | | | | | | | | | | | | | | static device mappings, rather than as the first of the initializations that a platform can hook into. This allows a platform to allocate KVA from the top of the address space downwards for things like static device mapping, and return the final "last usable address" result after that and other early init work is done. Because some platforms were doing work in initarm_lastaddr() that needs to be done early, add a new initarm_early_init() routine and move the early init code to that routine on those platforms. Rename platform_devmap_init() to initarm_devmap_init() to match all the other init routines called from initarm() that are designed to be implemented by platform code. Add a comment block that explains when these routines are called and the type of work expected to be done in each of them.
* Move remaining code and data related to static device mapping into theian2013-11-041-5/+6
| | | | | | | new devmap.[ch] files. Emphasize the MD nature of these things by using the prefix arm_devmap_ on the function and type names (already a few of these things found their way into MI code, hopefully it will be harder to do by accident in the future).
* Fix-up DTB for Armada XP registers' base according to the actual settingszbb2013-10-281-0/+13
| | | | | | | | | | | Depending on u-boot's flavor some boards have their SoC registers base address configured to 0xD0000000 and other to 0xF1000000. U-boot is passing currently set value via CP15 register. In order to create proper mapping for SoC registers and allow further successful initialization it is necessary to replace fdt_immr_pa with the real value and eventually fix-up device tree blob. Tested by: kevlo
* Retire arm_remap_nocache() and the data and constants associated with it.ian2013-10-271-1/+1
| | | | | | The only remaining user was the code that allocates bounce pages for armv4 busdma. It's not clear why bounce pages would need uncached memory, but if that ever changes, kmem_alloc_attr() would be the way to get it.
* Remove #include <machine/frame.h> from all the arm code that doesn'tian2013-10-271-1/+0
| | | | | | really need it. That would be almost everywhere it was included. Add it in a couple files that really do need it and were previously getting it by accident via another header.
* Remove all #include <machine/pmap.h> from arm code. It's alreadyian2013-10-271-1/+0
| | | | | | | included by vm/pmap.h, which is a prerequisite for arm/machine/pmap.h so there's no reason to ever include it directly. Thanks to alc@ for pointing this out.
* Properly initialize Armada XP MP subsystem.gber2013-05-061-0/+5
| | | | | | | | | | - correct setting of Auxiliary Control Register for MP mode - correct setting of Auxiliarty Debug registers - cleanup management of memory contains bootup code - early initialization of Coherency Fabric (MP and not-MP mode) - enable Snoop Filtering Obtained from: Semihalf
* Initialize L2 cache for Armada XP.gber2013-05-061-0/+6
| | | | Obtained from: Semihalf
* Move initialization of CESA decoding windows from common sectiongber2013-05-061-24/+0
| | | | | | | | | | | | to driver specific files. - window initialization is done during device attach - CESA TDMA decoding windows values are set based on DTS, not copied from CPU registers - remove unnecessary virtual mapping - update dts file Obtained from: Semihalf
* Add a default do-nothing implementation of fdt_pci_devmap() using a weak alias,ian2013-01-271-0/+19
| | | | | | | | | | | so that we don't need an empty implementation of it for every Marvell platform that has no PCI. This allows the removal of the SheevaPlug-specific stub and config files, and eliminates the need to add similar stubs for future models. Marvell platforms that do expose PCI are compiled with 'device pci' which causes the real (non-weak) implementation in dev/fdt/fdt_pci.c to be used. Approved by: cognet (mentor)
* Merge the FDT versions of initarm.andrew2012-11-031-490/+6
| | | | | | | | | The copies of initarm used on platforms with FDT support were almost identical. The differences were pulled out into separate functions that were called by initarm. This change merges the, now identical, copies of initarm and a few of it's support functions. This is a step towards a common kernel on ARMv6.
* Merge r242125 into the other ARMv6 copies of initarm.andrew2012-10-311-0/+5
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* Pull out the SoC specific parts of initarm into separate functionsandrew2012-09-231-21/+42
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* Reduce the diff between the FDT implementations of initarm.andrew2012-09-221-6/+6
| | | | This only touches whitespace and comments.
* Create a common set_stackptrs in sys/arm/machdep.c.andrew2012-09-221-19/+0
| | | | | | | On single core devices set_stackptrs is only ever called with cpu = 0 in initarm and will be identical to the existing function. On SMP this needs to be implemented for sys/arm/mp_machdep.c, but the implementations are identical for each SoC.
* Merging of projects/armv6, part 7gonzo2012-08-151-26/+146
| | | | | | Add Marvell ARMADA XP support Obtained from: Marvell, Semihalf
* Remove some unused variables/externs that have been copied too many times...imp2012-07-101-6/+0
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* Fix LINT.marcel2012-07-051-1/+1
| | | | Obtained from: Juniper Networks, Inc.
* More Linux boot support. Create arm_dump_avail_init() to initializeimp2012-06-141-6/+1
| | | | | | this array either from Linux boot data, when enabled, or in the typical way that most ports do it. arm_pyhs_avail_init is coming soon since it must be a separate function.
* Create default_parse_boot_param which, if FreeBSD /boot/loader supportimp2012-06-141-33/+8
| | | | | | | | | is enabled, sets values based on the metadata passed in. Otherwise fake_preload_metadata is called. Change the default parse_boot_param to default_parse_boot_param. Enable this functionality only on the mv platform, which is where most of the code is from. Reviewed by: cognet, Ian Lapore
* Modify all the arm platform files to call parse_boot_param passing inimp2012-06-141-2/+2
| | | | | | | | | | | | | the boot parameters from initarm first thing. parse_boot_param parses the boot arguments and converts them to the /boot/loader metadata the rest of the kernel uses. parse_boot_param is a weak alias to fake_preload_metadata, which all the platforms use now, but may become more extensive in the future. Since it is a weak symbol, specific boards may define their own parse_boot_param to interface to custom boot loaders. Reviewed by: cognet@, Ian Lapore
* Trim trailing whitespace...imp2012-06-131-1/+1
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* Pull out the common code to initialise proc0 & thread0 from initarm to aandrew2012-06-101-10/+1
| | | | | | common function. Reviewed by: imp
* Minor rearrangement of the locore <-> initarm interface. Pass in aimp2012-06-031-1/+3
| | | | | | structure with the first 4 registers to allow a wider range of boot loaders to work. Future commits will make use of this to centralize support for the different loaders.
* Add architecture dependent code to support NAND Framework on Marvell SoCs.gber2012-05-181-12/+45
| | | | | Obtained from: Semihalf Supported by: FreeBSD Foundation, Juniper Networks
* Make sure we do not provide the page 0 to the VM. It can't handle it properly,cognet2012-02-291-3/+13
| | | | | | | because pmap_extract() returns 0 when there's no mapping. PR: arm/154227 MFC after: 1 week
* Fix OF_finddevice error return value in case of FDT.jchandra2011-12-021-4/+4
| | | | | | | | | | | | | | | | | | | According to the open firmware standard, finddevice call has to return a phandle with value of -1 in case of error. This commit is to: - Fix the FDT implementation of this interface (ofw_fdt_finddevice) to return (phandle_t)-1 in case of error, instead of 0 as it does now. - Fix up the callers of OF_finddevice() to compare the return value with -1 instead of 0 to check for errors. - Since phandle_t is unsigned, the return value of OF_finddevice should be checked with '== -1' rather than '<= 0' or '> 0', fix up these cases as well. Reported by: nwhitehorn Reviewed by: raj Approved by: raj, nwhitehorn
* Fix build when DEBUG is defined in the kernel configuration file (e.g.marcel2011-10-041-3/+0
| | | | LINT).
* Do not call platform_gpio_init() early. It doesn't work because we domarcel2011-07-151-6/+1
| | | | | | not have enough information to reliably setup GPIO pins. Do it when we attach the gpio driver. This prevents hangs and the need to fake up a softc.
* Set preload_addr_relocate accordingly so that preloaded modules andmarcel2011-07-151-0/+1
| | | | images are properly relocated.
* Fix r217688. We need to call init_param1() before we use msgbufsize,marcel2011-01-221-1/+3
| | | | now that the size of the message buffer is a tunable.
* Fix backtraces by defining ksym_start & ksym_end if DDB ismarcel2011-01-221-0/+8
| | | | | | | | defined. The kernel linker doesn't deal with symbols of type NOTYPE and typically gives the wrong symbol ($a) for local symbols. Obtained from: Juniper Networks, Inc.
* Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.pluknet2011-01-211-3/+2
| | | | | | | Submitted by: perryh pluto.rain.com (previous version) Reviewed by: jhb Approved by: kib (mentor) Tested by: universe
* Now that we are fully FDT-driven on MRVL platforms, remove PHYSMEM_SIZE option.raj2010-07-191-27/+3
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* Eliminate FDT_IMMR_VA define.raj2010-07-191-1/+1
| | | | | This removes platform dependencies from <machine>/fdt.h for the benfit of portability.
* Convert Marvell ARM platforms to FDT convention.raj2010-06-131-85/+274
| | | | | | | | | | | | | | | | | | | | | | | | | The following systems are involved: - DB-88F5182 - DB-88F5281 - DB-88F6281 - DB-78100 - SheevaPlug This overhaul covers the following major changes: - All integrated peripherals drivers for Marvell ARM SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values). - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say good by to obio / mbus drivers and numerous hard-coded config data. Note that world needs to be built WITH_FDT for the affected platforms. Reviewed by: imp Sponsored by: The FreeBSD Foundation.
* Do not force verbose and single mode in non-metadata boot case.raj2010-02-241-2/+1
| | | | We want to go multi-user by default also in case of booting without loader(8).
* Eliminate an unnecessary vm include file.alc2009-11-041-1/+0
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* Review previous change. It has no relation to the I-cache coherencymarcel2009-10-211-1/+1
| | | | | | changes and thus unintentional. Spotted by: rdivacky@
* o Introduce vm_sync_icache() for making the I-cache coherent withmarcel2009-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | the memory or D-cache, depending on the semantics of the platform. vm_sync_icache() is basically a wrapper around pmap_sync_icache(), that translates the vm_map_t argumument to pmap_t. o Introduce pmap_sync_icache() to all PMAP implementation. For powerpc it replaces the pmap_page_executable() function, added to solve the I-cache problem in uiomove_fromphys(). o In proc_rwmem() call vm_sync_icache() when writing to a page that has execute permissions. This assures that when breakpoints are written, the I-cache will be coherent and the process will actually hit the breakpoint. o This also fixes the Book-E PMAP implementation that was missing necessary locking while trying to deal with the I-cache coherency in pmap_enter() (read: mmu_booke_enter_locked). The key property of this change is that the I-cache is made coherent *after* writes have been done. Doing it in the PMAP layer when adding or changing a mapping means that the I-cache is made coherent *before* any writes happen. The difference is key when the I-cache prefetches.
* Eliminate platform_pmap_init() to simplify Marvell bootstrap code.raj2009-08-251-2/+5
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* Map DPCPU pages into ARM kernel VA space.raj2009-07-011-3/+3
| | | | | | | | | | | DPCPU area was not properly mapped into kernel VA space, which caused page fault on the first DPCPU access. This patch fixes the problem by mapping DPCPU area into kernel VA space. Submitted by: Michal Hajduk, Piotr Ziecik Reviewed by: cognet, stas Approved by: re (kib) Obtained from: Semihalf
* Implement a facility for dynamic per-cpu variables.jeff2009-06-231-0/+5
| | | | | | | | | | | | | | | - Modules and kernel code alike may use DPCPU_DEFINE(), DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined PCPU_*. Requires only one extra instruction more than PCPU_* and is virtually the same as __thread for builtin and much faster for shared objects. DPCPU variables can be initialized when defined. - Modules are supported by relocating the module's per-cpu linker set over space reserved in the kernel. Modules may fail to load if there is insufficient space available. - Track space available for modules with a one-off extent allocator. Free may block for memory to allocate space for an extent. Reviewed by: jhb, rwatson, kan, sam, grehan, marius, marcel, stas
* Improve and extend Marvell SOCs platform code.raj2009-01-081-0/+5
| | | | | | | | | | | | | | | - Allow for setting per platform MPP/GPIO configuration in the kernel, so that we can override all settings firmware might set. - Set decode windows for the remaining on-chip peripherals: CESA, SATA and XOR. - Improve handling of USB controllers so that all port are available on the given SOC/platform (e.g. up to three on DB-78xxx), this includes rework of USB decode windows set-up. - Other minor fixes and cosmetics. Obtained from: Semihalf
* - Fix spelling error in comments.stas2008-12-011-1/+1
| | | | | | PR: arm/128891 Submitted by: Pavel Pankov <pankov_p@mail.ru> Approved by: kib (mentor)
* Auto-size kernel page tables allocation on Marvell systems.raj2008-11-061-11/+9
| | | | | | This allows mini dumps to fully work for these platforms. Obtained from: Juniper Networks, Semihalf
* Introduce basic support for Marvell families of system-on-chip ARM devices:raj2008-10-131-0/+643
* Orion - 88F5181 - 88F5182 - 88F5281 * Kirkwood - 88F6281 * Discovery - MV78100 The above families of SOCs are built around CPU cores compliant with ARMv5TE instruction set architecture definition. They share a number of integrated peripherals. This commit brings support for the following basic elements: * GPIO * Interrupt controller * L1, L2 cache * Timers, watchdog, RTC * TWSI (I2C) * UART Other peripherals drivers will be introduced separately. Reviewed by: imp, marcel, stass (Thanks guys!) Obtained from: Marvell, Semihalf
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