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* Remove bus_{mem,p}io.h and related code for a micro-optimization on i386nyan2005-05-292-66/+0
* s/_KLD_MODULE/KLD_MODULE/cognet2005-05-261-1/+1
* Remove bits specific to CPUs we won't support (< armv4).cognet2005-05-251-36/+4
* Use asm versions of in_cksum() and friends.cognet2005-05-241-1/+11
* Asm version of bswap16().cognet2005-05-241-5/+6
* Make sure we clean the RAS start address once we're done.cognet2005-05-241-0/+12
* Add empty header (except of the multiple-inclusion protection) tomarcel2005-04-201-0/+10
* Break out the definition of bus_space_{tag,handle}_t and a few other typesimp2005-04-182-11/+47
* Import a basic implementation of the restartable atomic sequences to providecognet2005-04-072-38/+148
* - Try harder to report dirty page.cognet2005-04-071-0/+2
* Divorce critical sections from spinlocks. Critical sections as denoted byjhb2005-04-042-55/+2
* Bring in a version of float.h more correct for softfloat.cognet2005-03-201-12/+17
* Refactor the bus_dma header files so that the interface is described inscottl2005-03-142-152/+108
* netchild's mega-patch to isolate compiler dependencies into a centraljoerg2005-03-023-11/+18
* Instead of using sysarch() to store-retrieve the tp, add a magic address,cognet2005-02-263-0/+5
* Add the field in the md part of the struct thread required by ARM_[GET|SET]_TP.cognet2005-02-261-0/+1
* Implement two new sysarch for arm, ARM_GET_TP and ARM_SET_TP, to work aroundcognet2005-02-251-0/+3
* Use a common multi-inclusion protection, and add such aru2005-02-191-4/+4
* Define NIRQ to 64 for CPU_ARM9, because Cirrus Logic EP93XX cores providescognet2005-02-131-0/+4
* Sort functions.njl2005-02-011-4/+4
* Start to support the big endian case as well.cognet2005-01-181-0/+13
* Add the prototype for bus_dmamap_load_mbuf_sg().cognet2005-01-151-0/+3
* Add support for ptrace() and gdb breakpoints.cognet2005-01-102-0/+8
* Start all license statements with /*-imp2005-01-0540-43/+39
* Make sure gcc doesn't generate something such as swp r3, r4, [r3] for __swp,cognet2004-12-181-1/+1
* Remove an unused field from the struct pv_entry.cognet2004-12-051-4/+3
* Implement breakpoints and single stepping on arm.cognet2004-11-212-6/+13
* Implement enough to be able to enter and leave DDB.cognet2004-11-202-3/+20
* Get the kernel stack right now that the u-area is gone.cognet2004-11-201-1/+1
* Remove UAREA_PAGES and USPACE definitions. The definitions ofdas2004-11-201-9/+1
* Import a RET macro, that will use bx if the arch supports it.cognet2004-11-091-0/+36
* Import md bits for mem(4) on arm.cognet2004-11-072-45/+44
* Disable interrupts for atomic_cmpset_32, this one is just not atomic.cognet2004-11-051-10/+13
* Protect the function declarations with #ifdef _KERNEL.cognet2004-11-041-0/+2
* Directly use __pcpu for PCPU_* instead of pcpup.cognet2004-11-041-3/+4
* Decrease KSTACK_PAGES and UAREA_PAGES.cognet2004-11-041-2/+2
* Use interrupts_disable() and interrupts_restore() as intr_disable() andcognet2004-11-041-24/+6
* Don't barf if no CPU type is defined while compiling kernel modules.cognet2004-11-041-2/+2
* Implement get_cyclecount().cognet2004-11-041-1/+7
* Try to implement atomic operations using swp, instead of disabling interrupts.cognet2004-11-041-76/+65
* Use casts to enforce the return type of bswap16() and bswap32().cognet2004-11-041-6/+6
* Add optimized version of the bswap macroes for constants if __OPTIMIZED__ iscognet2004-10-011-2/+30
* Remove the empty definition of struct osigcontext, as it will never be used.cognet2004-09-231-3/+0
* Remove the pcb32_cstate field of struct pcb.cognet2004-09-231-1/+0
* Declare sigcode and szsigcode.cognet2004-09-231-0/+3
* Define VM_PROT_READ_IS_EXEC.cognet2004-09-231-0/+1
* Implement _mcount().cognet2004-09-231-49/+52
* Define STACKALIGNBYTES and STACKALIGN.cognet2004-09-231-0/+2
* We are using _mcount, not __mcount.cognet2004-09-231-6/+1
* Add new functions to know which irqs are pending, and to mask and unmaskcognet2004-09-231-35/+4
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