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* Only work around errata when we are on a part where the erratum applies.andrew2013-01-061-0/+1
| | | | Reviewed by: gonzo
* Document the known values of the RTL release field in the cache is registerandrew2013-01-011-0/+8
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* PL310 driver update:gonzo2012-12-311-1/+122
| | | | | | | | | | | | | | | | | - Add pl310.disable tunable to disable L2 cache altogether. In order to make sure that it's 100% disabled we use cache event counters for cache line eviction and read allocate events and panic if any of these counters increased. This is purely for debugging purpose - Direct access DEBUG_CTRL and CTRL might be unavailable in unsecure mode, so use platform-specific functions for these registers - Replace #if 1 with proper erratum numbers - Add erratum 753970 workaround - Remove wait function for atomic operations - Protect cache operations with spin mutex in order to prevent race condition - Disable instruction cache prefetch and make sure data cache prefetch is enabled in OMAP4-specific intialization
* Merging projects/armv6, part 1gonzo2012-08-151-0/+38
Cummulative patch of changes that are not vendor-specific: - ARMv6 and ARMv7 architecture support - ARM SMP support - VFP/Neon support - ARM Generic Interrupt Controller driver - Simplification of startup code for all platforms
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