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* Fix confusing naming of Marvell ARM CPU specific routines.raj2009-01-091-11/+11
* Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.raj2008-10-131-0/+12
* Merge support from p4 (from NetBSD) for arm9e and arm10, arm11 cores. Notimp2007-10-181-3/+55
* Add a new set of functions to handle L2 cache. Make them no-op for everycognet2007-07-271-9/+20
* Remove __Pkevlo2007-03-211-12/+12
* Identify the xscale 81342.cognet2006-11-071-2/+24
* Finally bring it support for the i80219 XScale processor.cognet2006-08-241-7/+10
* Don't enable the FIQ in enable_interrupts() if F32_bit is not specified.cognet2006-06-011-1/+1
* Bring in bits I forgot while importing write back support for arm9.cognet2005-06-031-11/+13
* Start all license statements with /*-imp2005-01-051-1/+1
* Implement enough to be able to enter and leave DDB.cognet2004-11-201-0/+1
* Use interrupts_disable() and interrupts_restore() as intr_disable() andcognet2004-11-041-24/+6
* Nuke disable_intr() and enable_intr(), as it already exists elsewhere.cognet2004-07-201-3/+1
* Implement a stub breakpoint().cognet2004-07-121-0/+5
* Import FreeBSD/arm kernel bits.cognet2004-05-141-0/+530
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