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path: root/sys/arm/include/cpufunc.h
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* MFC r276247, r276333, r276334, r276335, r276336, r276340, r276350:ian2015-02-121-1/+0
* MFC 265861, 265870:ian2014-05-181-0/+2
* MFC 265111: Make a declaration into a proper function prototype.ian2014-05-171-1/+1
* MFC 264990, 264994, 265020, 265025:ian2014-05-171-0/+1
* MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,ian2014-05-171-106/+0
* MFC r262534, r262548, r262549, r262552, r262568, r262581, r262583, r262584,ian2014-05-161-0/+1
* MFC r262409, r262411, r262413, r262420, r262426, r262427, r262440, r262456,ian2014-05-161-0/+11
* MFC r258359, r258742, r258845, r259936, r259640ian2014-05-141-2/+2
* MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,ian2014-05-141-10/+1
* Replace generic ARM11 option with more specificgonzo2012-12-201-1/+17
* Don't define intr_disable and intr_restore as macros. The macrosmarcel2012-11-271-8/+24
* Add support for ARM11 cpufuncgonzo2012-08-261-0/+7
* Merging projects/armv6, part 1gonzo2012-08-151-2/+101
* trim trailing whitespaceimp2012-06-131-4/+4
* Add basic cpu_sleep() support for Marvell SoCs. This drops my SheevaPlug'smav2010-09-181-0/+1
* Add support for FA626TE.kevlo2010-05-041-6/+6
* Add support for Cavium Econa CNS11XX ARM boards. These boards wererpaulo2010-01-041-0/+23
* Fix confusing naming of Marvell ARM CPU specific routines.raj2009-01-091-11/+11
* Introduce low-level support for new Marvell core CPUs: 88FR131, 88FR571.raj2008-10-131-0/+12
* Merge support from p4 (from NetBSD) for arm9e and arm10, arm11 cores. Notimp2007-10-181-3/+55
* Add a new set of functions to handle L2 cache. Make them no-op for everycognet2007-07-271-9/+20
* Remove __Pkevlo2007-03-211-12/+12
* Identify the xscale 81342.cognet2006-11-071-2/+24
* Finally bring it support for the i80219 XScale processor.cognet2006-08-241-7/+10
* Don't enable the FIQ in enable_interrupts() if F32_bit is not specified.cognet2006-06-011-1/+1
* Bring in bits I forgot while importing write back support for arm9.cognet2005-06-031-11/+13
* Start all license statements with /*-imp2005-01-051-1/+1
* Implement enough to be able to enter and leave DDB.cognet2004-11-201-0/+1
* Use interrupts_disable() and interrupts_restore() as intr_disable() andcognet2004-11-041-24/+6
* Nuke disable_intr() and enable_intr(), as it already exists elsewhere.cognet2004-07-201-3/+1
* Implement a stub breakpoint().cognet2004-07-121-0/+5
* Import FreeBSD/arm kernel bits.cognet2004-05-141-0/+530
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