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path: root/sys/arm/at91/uart_dev_at91usart.c
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* Remove support for SKYEYE simulatorimp2011-01-051-24/+0
* if_ate.c:cognet2010-10-061-3/+7
* - Proprely intialize UART parameters at probe stage, so uart(4)stas2009-08-151-4/+4
* Migrate towards using at91_master_clock. Initialize the clocks forimp2009-01-221-3/+3
* Tweak the disclaimer section of the license to match COPYRIGHT, forimp2008-11-251-10/+11
* - Fix two minor errors in at91 code.stas2008-11-181-1/+1
* Use bus_get_dma_tag() instead of NULL here. Not really needed for atmelimp2008-10-071-3/+4
* Make the at91 uart(4) driver compile again.ed2008-08-021-9/+12
* Expand kdb_alt_break a little, most commonly used with the optionpeter2008-05-041-2/+13
* Add a new 'why' argument to kdb_enter(), and a set of constants to userwatson2007-12-251-1/+1
* Don't expose the uart_ops structure directly, but instead havemarcel2007-04-021-2/+4
* - Add a uart_rxready() and corresponding device-specific implementationsmarius2007-01-181-7/+5
* Unbreak build for Skyeye: do not attempt to do any DMA, as Skyeye doesn'tcognet2006-12-071-1/+10
* Fix ALT_BREAK_TO_DEBUGGER on the AT91 :cognet2006-07-201-5/+20
* Be sure to flush the cache after a partial read on timeout. Expandimp2006-07-141-3/+7
* MFp4:imp2006-07-021-53/+208
* Resurrect Skyeye support :cognet2006-05-131-12/+12
* MFp4: Catchup with recent UART changes.cognet2006-04-061-13/+13
* Optimize the TX side of the part by using the PDC to move bytes out toimp2006-04-061-27/+99
* MFp4: Handle break interrupts (it seems to only work for USART, not DBGU).cognet2006-03-221-2/+12
* Get this to compile with the recent UART changes.cognet2006-02-271-3/+3
* Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoCimp2006-02-041-0/+408
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