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* MFC r280278, r280402:ian2015-05-231-6/+5
* MFC r276187, r276190, r271422:ian2015-02-121-91/+37
* MFC 262952, 262958, 262966, 262979, 262980, 262986, 262987, 262995, 262997,ian2014-05-171-14/+5
* MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,ian2014-05-171-80/+21
* MFC r261414, r261415, r261417, r261418, r261419ian2014-05-151-18/+27
* MFC r258359, r258742, r258845, r259936, r259640ian2014-05-141-2/+2
* Add the frame information to cpu_switch to allow us to unwind out of it,andrew2013-08-251-0/+5
* Rename device vfp to option VFP and retire the ARM_VFP_SUPPORT option. Thisandrew2013-08-171-6/+6
* Remove the ARMFPE option. It is unsupported, and appears to be broken asandrew2013-08-171-9/+0
* Insert STOP_UNWINDING directives in the _start (kernel entry point) andian2013-05-041-0/+1
* Add an END macro to ARM. This is mostly used to tell gas where the boundsandrew2013-03-161-0/+6
* Fix stack alignment in the kernel to be on an 8 byte boundary as requiredandrew2013-03-061-0/+5
* Only spin on the blocked_lock for SCHED_ULE+SMP, as it's done on the othercognet2013-01-151-0/+3
* Merging projects/armv6, part 1gonzo2012-08-151-60/+101
* Final whitespace trim.imp2012-06-131-5/+5
* Oops. ARM_RAS_END is ARM_TP_ADDRESS + 8, not 4.cognet2009-02-131-1/+1
* To prevent various race conditions in the RAS code, store and restore thecognet2009-02-121-4/+16
* Eliminate flushing of L2 cache in ARM context switch routines.raj2008-10-161-8/+0
* Provide L2 cache synchronization (write back + invalidation) on ARM.raj2008-10-131-0/+8
* Store the PC while context switching, for the benefits of DDB.cognet2008-08-021-0/+1
* Improve ARM_TP_ADDRESS and RAS area.raj2008-02-051-2/+2
* Do not use __XSCALE__ to detect if pld/strd/ldrd is available, usecognet2007-10-131-3/+3
* Use the third argument of cpu_switch(), as done for i386/amd63, as it iscognet2007-08-071-6/+20
* Not only disable/enable interrupts, do it for FIQs as well, when needed.cognet2006-04-091-1/+1
* Remove a never reached RET.cognet2005-10-041-1/+0
* strd needs the destination to be double-word aligned, but the pointer passedcognet2005-10-041-6/+0
* Implement savectx().cognet2005-10-031-0/+15
* Write back affected pages in pmap_qremove() as well. This removes the needcognet2005-05-241-1/+1
* Use [ldr|str]t instead of [ldr|str] when accessing ARM_TP_ADDRESS.cognet2005-03-061-4/+3
* In cpu_throw(), correctly calculate td->td_md.md_tp.cognet2005-03-011-2/+2
* Instead of using sysarch() to store-retrieve the tp, add a magic address,cognet2005-02-261-1/+15
* Start all license statements with /*-imp2005-01-051-2/+2
* Update the sp after popping the regs.cognet2004-12-141-1/+1
* Save a few more cycles in cpu_switch() and cpu_throw().cognet2004-12-121-29/+24
* Do not change the page directory and do not flush the TLB when switching tocognet2004-12-051-26/+6
* Set the frame pointer to 0 in fork_trampoline().cognet2004-11-211-0/+1
* Use the RET macro.cognet2004-11-091-2/+1
* Remove useless code.cognet2004-11-071-14/+0
* Save a few cycles in context switch.cognet2004-11-051-90/+36
* Remove dead code.cognet2004-09-281-3/+0
* Implement cpu_throw().cognet2004-09-231-96/+105
* Import FreeBSD/arm kernel bits.cognet2004-05-141-0/+543
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