| Commit message (Collapse) | Author | Age | Files | Lines |
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the name the function will have when the new ARM_INTRNG code is integrated,
and doing this rename first will make it easier to toggle the new interrupt
handling code on/off with a config option for debugging.
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This also adds a newbus interface that allows a SoC to override the
following settings:
- if_dwc specific SoC initialization;
- if_dwc descriptor type;
- if_dwc MII clock.
This seems to be an old version of the hardware descriptors but it is
still in use in a few SoCs (namely Allwinner A20 and Amlogic at least).
Tested on Cubieboard2 and Banana pi.
Tested for regressions on Altera Cyclone by br@ (old version).
Obtained from: NetBSD
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years for head. However, it is continuously misused as the mpsafe argument
for callout_init(9). Deprecate the flag and clean up callout_init() calls
to make them more consistent.
Differential Revision: https://reviews.freebsd.org/D2613
Reviewed by: jhb
MFC after: 2 weeks
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Submitted by: John Wehle
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Differential Revision: https://reviews.freebsd.org/D2590
Submitted by: John Wehle
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Submitted by: John Wehle
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determined at runtime so there's no need to set the values in
each DTS.
Tested on YYHD18 (aml8726-m3), VSATV102 (aml8726-m6), and
ODROIDC1 (aml8726-m8b).
Differential Revision: https://reviews.freebsd.org/D2588
Submitted by: John Wehle
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we have both the Amlogic pic and a GIC. This may be the case in some
configurations.
Differential Revision: https://reviews.freebsd.org/D2432
Submitted by: John Wehle <john@feith.com>
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The aml8726-m3 SoC is identified as a Cortex A9-r2 rev 4 CPU and
it hangs sometimes during the boot when WFI is used by the kernel.
Differential Revision: https://reviews.freebsd.org/D2473
Submitted by: John Wehle
Suggested by: ian@
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Amlogic pic driver.
Differential Revision: https://reviews.freebsd.org/D2472
Submitted by: John Wehle
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available on the aml8726-m6 (and later) SoC which allows for
lower speeds.
Differential Revision: https://reviews.freebsd.org/D2433
Submitted by: John Wehle
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1) Advertise the actual min / max speeds the hardware is capable
of supporting given the reference clock used by the board.
2) Rather than attempting to extend the hardware's timeout register
in software (the hardware doesn't have sufficient bits to directly
support long timeouts), simply implement the same timeout approach
used in the SDXC driver.
3) Set the timeout for a linked command (e.g. STOP TRANSMISSION) based
on the previous multiblock read / write.
The changes have been smoke tested on both the ODROID-C1 and the VSATV102-M6
using the following cards:
* PQI 2GB microSD
* SanDisk 2GB microSD
* PQI 8GB SDHC (not a microSD so only tested on the ATV-102)
* PNY 8GB microSDHC
* SanDisk Ultra 32GB microSDHC
Submitted by: John Wehle
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options they set to the main kernel config.
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- Remove a redundant file from files.aml8726
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This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.
This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.
MFC after: 1 week
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supply clk81 information. It also changes the hardware strings
in some of the drivers to match what's present in the GNU files.
Submitted by: John Wehle
Reviewed by: imp
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present in the GNU dts files.
Submitted by: John Wehle
Reviewed by: imp
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specially aml8726-m6 and aml8726-m8b SoC based devices.
aml8726-m6 SoC exist in devices such as Visson ATV-102.
Hardkernel ODROID-C1 board has aml8726-m8b SoC.
The following support is included:
Basic machdep code
SMP
Interrupt controller
Clock control driver (aka gate)
Pinctrl
Timer
Real time clock
UART
GPIO
I2C
SD controller
SDXC controller
USB
Watchdog
Random number generator
PLL / Clock frequency measurement
Frame buffer
Submitted by: John Wehle
Approved by: stas (mentor)
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